Searched full:pma (Results 1 – 7 of 7) sorted by relevance
| /Documentation/devicetree/bindings/net/pcs/ |
| D | snps,dw-xpcs.yaml | 18 Synopsys PMA (also called DesignWare Consumer/Enterprise PHY) although in
28 - description: Synopsys DesignWare XPCS with none or unknown PMA
30 - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA
32 - description: Synopsys DesignWare XPCS with Consumer Gen2 3G PMA
34 - description: Synopsys DesignWare XPCS with Consumer Gen2 6G PMA
36 - description: Synopsys DesignWare XPCS with Consumer Gen4 3G PMA
38 - description: Synopsys DesignWare XPCS with Consumer Gen4 6G PMA
40 - description: Synopsys DesignWare XPCS with Consumer Gen5 10G PMA
42 - description: Synopsys DesignWare XPCS with Consumer Gen5 12G PMA
83 PCS/PMA layer can be clocked by an internal reference clock source
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| /Documentation/devicetree/bindings/phy/ |
| D | samsung,ufs-phy.yaml | 28 - const: phy-pma
102 reg-names = "phy-pma";
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| D | cdns,dphy.yaml | 23 - description: PMA state machine clock
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| D | ti,phy-j721e-wiz.yaml | 79 clock source for the reference clock used in the PHY and PMA digital
147 WIZ node should have subnodes for each of the PMA common refclock
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| D | samsung,usb3-drd-phy.yaml | 69 - const: pma
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| /Documentation/devicetree/bindings/net/ |
| D | xlnx,axi-ethernet.yaml | 101 - description: MGT reference clock (used by optional internal PCS/PMA PHY)
121 description: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
122 modes, where "pcs-handle" should be used to point to the PCS/PMA PHY,
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | cdns,mhdp8546.yaml | 24 The AUX and PMA registers are not part of this range, they are instead
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