Searched full:prr (Results 1 – 3 of 3) sorted by relevance
4 $id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml#21 - renesas,prr34 prr: chipid@ff000044 {35 compatible = "renesas,prr";
46 Partial Reconfiguration Region (PRR)48 * A PRR is a specific section of an FPGA reserved for reconfiguration.49 * A base (or static) FPGA image may create a set of PRR's that later may51 * The size and specific location of each PRR is fixed.52 * The connections at the edge of each PRR are fixed. The image that is loaded53 into a PRR must fit and must use a subset of the region's connections.59 * An FPGA image that is designed to be loaded into a PRR. There may be60 any number of personas designed to fit into a PRR, but only one at a time108 a soft logic bridge (Bridge0-2) in the FPGA. The contents of each PRR can be159 base FPGA region. The "Full Reconfiguration to add PRR's" example below shows[all …]
43 (a) flash new firmware that disables SPI (set PRR.2, and disable pullups