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/Documentation/devicetree/bindings/remoteproc/
Dti,pru-rproc.yaml4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-rproc.yaml#
7 title: TI Programmable Realtime Unit (PRU) cores
14 (PRU-ICSS or PRUSS) has two 32-bit load/store RISC CPU cores called
15 Programmable Real-Time Units (PRUs), each represented by a node. Each PRU
17 use the Data RAMs present within the PRU-ICSS for code execution.
20 PRU cores called RTUs with slightly different IP integration. The K3 SoCs
22 auxiliary Transmit PRU cores called Tx_PRUs that augment the PRUs. Each RTU
23 or Tx_PRU core can also be used independently like a PRU, or alongside a
24 corresponding PRU core to provide/implement auxiliary functionality/support.
26 Each PRU, RTU or Tx_PRU core node should be defined as a child node of the
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Dti,pru-consumer.yaml4 $id: http://devicetree.org/schemas/remoteproc/ti,pru-consumer.yaml#
7 title: TI PRU Consumer Common Properties
13 A PRU application/consumer/user node typically uses one or more PRU device
14 nodes to implement a PRU application/functionality. Each application/client
15 node would need a reference to at least a PRU node, and optionally define
17 properties are a list of common properties supported by the PRU remoteproc
26 description: phandles to the PRU, RTU or Tx_PRU nodes used
37 firmwares for the PRU cores, the default firmware for the core from
38 the PRU node will be used if not provided. The firmware names should
39 correspond to the PRU cores listed in the 'ti,prus' property
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/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
36 0x0, but also has access to a secondary Data RAM (primary to the other PRU
38 by both the PRU cores. The Interrupt Controller (INTC) and a CFG module are
39 common to both the PRU cores. Each PRU core also has a private instruction
42 Various sub-modules within a PRU-ICSS subsystem are represented as individual
48 PRU-ICSS Node
50 Each PRU-ICSS instance is represented as its own node with the individual PRU
99 The various Data RAMs within a single PRU-ICSS unit are represented as a
130 PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
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/Documentation/devicetree/bindings/interrupt-controller/
Dti,pruss-intc.yaml7 title: TI PRU-ICSS Local Interrupt Controller
13 Each PRU-ICSS has a single interrupt controller instance that is common
14 to all the PRU cores. Most interrupt controllers can route 64 input events
18 interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
77 Client users shall use the PRU System event number (the interrupt source
78 that the client is interested in) [cell 1], PRU channel [cell 2] and PRU
113 /* AM33xx PRU-ICSS */
136 /* AM4376 PRU-ICSS */
/Documentation/devicetree/bindings/net/
Dti,icssg-prueth.yaml146 - $ref: /schemas/remoteproc/ti,pru-consumer.yaml#