Searched full:property (Results 1 – 25 of 942) sorted by relevance
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| /Documentation/devicetree/bindings/mux/ |
| D | mux-consumer.yaml | 14 want to use with a property containing a 'mux-ctrl-list': 23 each mux controller property must be documented in the device tree binding for 24 each consumer. An optional property "mux-control-names" may contain a list of 26 property. 29 be set to, the property "mux-states" must be used. An optional property 31 each of the multiplixer states listed in the "mux-states" property. 35 needs to set multiple states in a mux controller, then property 37 controller to a given state then property "mux-states" can be used. 55 "mux-control-names" property to map the name of the requested mux 56 controller to an index into the list given by the "mux-controls" property. [all …]
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| /Documentation/firmware-guide/acpi/ |
| D | DSD-properties-rules.rst | 7 Properties, Property Sets and Property Subsets 19 A device property is a data item consisting of a string key and a value (of a 32 A property set is a collection of properties applicable to a hardware entity 37 Property subsets are nested collections of properties. Each of them is 40 representation of property subsets is via the mechanism specified in the 45 Property sets may be hierarchical. That is, a property set may contain 46 multiple property subsets that each may contain property subsets of its 49 General Validity Rule for Property Sets 52 Valid property sets must follow the guidance given by the Device Properties UUID 59 return property sets which do not follow that rule from _DSD in data packages [all …]
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-370-xp.txt | 5 shall have the following property: 7 Required root node property: 12 following property: 14 Required root node property: 19 following property: 21 Required root node property:
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| D | 98dx3236.txt | 5 shall have the following property: 7 Required root node property: 12 following property: 14 Required root node property: 19 following property: 21 Required root node property:
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| D | armada-39x.txt | 5 following property: 7 Required root node property: 12 following property before the common "marvell,armada390" one: 14 Required root node property: 23 property before the common "marvell,armada390" one: 25 Required root node property:
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| /Documentation/devicetree/bindings/powerpc/ |
| D | ibm,powerpc-cpu-features.txt | 43 revision of the compatible property. 104 This property describes the privilege levels and/or software components 107 If bit 0 is set, then the hwcap-bit-nr property will exist. 118 This property describes the HV privilege support required to enable the 119 feature to lesser privilege levels. If the property does not exist then no 125 If the HFSCR bit is set, then the hfscr-bit-nr property will exist and 137 This property describes the OS privilege support required to enable the 138 feature to lesser privilege levels. If the property does not exist then no 144 If the FSCR bit is set, then the fscr-bit-nr property will exist and 153 This property exists when the hv-support property HFSCR bit is set. This [all …]
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| D | sleep.yaml | 7 title: PowerPC sleep property 15 this information is more complicated than a cell-index property can 17 may contain a "sleep" property which describes these connections. 19 The sleep property consists of one or more sleep resources, each of 36 property. If the clock domain is shared among devices that cannot be
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | interrupts.txt | 8 "interrupts" property, an "interrupts-extended" property, or both. If both are 19 The "interrupt-parent" property is used to specify the controller to which 21 controller node. This property is inherited, so it may be specified in an 23 "interrupts" property are always in reference to the node's interrupt parent. 25 The "interrupts-extended" property is a special form; useful when a node needs 27 the inherited one. Each entry in this property contains both the parent phandle 37 property. This is a empty, boolean property. An additional "#interrupt-cells" 38 property defines the number of cells needed to specify a single interrupt. 46 The #interrupt-cells property is set to 1 and the single cell defines the 69 The #interrupt-cells property is set to 2 and the first cell defines the [all …]
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| /Documentation/devicetree/bindings/x86/ |
| D | ce4100.txt | 7 name in their compatible property because they first appeared in this 44 This node describes the in-core peripherals. Required property: 49 This node describes the PCI bus on the SoC. Its property should be 55 to contain the interrupt property. Besides the interrupt property it has 56 to contain at least the reg property containing the PCI bus address and 57 compatible property according to "PCI Bus Binding Revision 2.1".
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| /Documentation/devicetree/bindings/ |
| D | example-schema.yaml | 45 # items is a list of possible values for the property. The number of 113 # Property names starting with '#' must be quoted 128 # The value that should be used if the property is not present 143 vendor,int-property: 148 vendor,bool-property: 154 vendor,string-array-property: 162 vendor,property-in-standard-units-microvolt: 178 description: Child nodes are just another property from a json-schema 184 vendor,a-child-node-property: 190 - vendor,a-child-node-property [all …]
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| D | resource-names.txt | 4 include a supplemental property for assigning names to each of the list 5 items. The names property consists of a list of strings in the same 6 order as the data in the resource property. 10 Resource Property Supplemental Names Property 18 The -names property must be used in conjunction with the normal resource 19 property. If not it will be ignored.
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi-props.yaml | 85 description: This property configures the byte lane setup timing 89 description: This property defines the duration of the address setup 93 description: This property defines the duration of the address hold 98 description: This property defines the duration of the data setup phase 102 description: This property defines the delay in nanoseconds between the 106 description: This property defines the duration of the data hold phase 110 description: This property defines the FMC_CLK output signal period in 114 description: This property defines the data latency before reading or 118 description: This property defines the duration of the address setup 122 description: This property defines the duration of the address hold [all …]
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| /Documentation/devicetree/bindings/usb/ |
| D | chipidea,usb2-common.yaml | 54 AHBBRST at SBUSCFG, the range is from 0x0 to 0x7. This property is 56 meaning of each value. If this property is not existed, it will use 67 of this property will only take effect if property "ahb-burst-config" 68 is set to 0, if this property is missing the reset default of the 79 this property will only take effect if property "ahb-burst-config" 80 is set to 0, if this property is missing the reset default of the 106 After setting this property, the value of register ttctrl.ttha 108 value. It needs to be very carefully for setting this property, it 111 at RTL is 0, so this property only affects siTD. 113 If this property is not set, the max packet size is 1023 bytes, and [all …]
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| /Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | fsl,qe-firmware.yaml | 18 property, and any firmware-specific properties. The node should be placed 20 fsl,firmware-phandle property. Other QE nodes that need the same firmware 21 should define an fsl,firmware-phandle property that points to the firmware node 24 The fsl,firmware property can be specified in the DTS (possibly using incbin) 35 A standard property. This property contains the firmware binary "blob".
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm.txt | 8 with a property containing a 'pwm-list': 17 property must be documented in the device tree binding for each device. 18 An optional property "pwm-names" may contain a list of strings to label 19 each of the PWM devices listed in the "pwms" property. If no "pwm-names" 20 property is given, the name of the user node will be used as fallback. 23 "pwm-names" property to map the name of the PWM device requested by the 24 pwm_get() call to an index into the list given by the "pwms" property.
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| /Documentation/devicetree/bindings/opp/ |
| D | opp-v2-base.yaml | 31 Missing property means devices have independent clock/voltage/current 43 property. 49 required property for all device nodes, unless another "required" 50 property to uniquely identify the OPP nodes exists. Devices like power 51 domains must have another (implementation dependent) property. 138 should match the number of interconnect paths. This property is only 164 This property allows a platform to enable only a subset of the OPPs 168 Each block present in the array of blocks in this property, represents 199 OPP of the device(s), whose OPP's phandle is present in this property, 201 this property is present). [all …]
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| /Documentation/arch/powerpc/ |
| D | associativity.rst | 17 Hypervisor indicates the type/form of associativity used via "ibm,architecture-vec-5 property". 18 Bit 0 of byte 5 in the "ibm,architecture-vec-5" property indicates usage of Form 0 or Form 1. 20 bit 2 of byte 5 in the "ibm,architecture-vec-5" property is used. 31 The “ibm,associativity” property contains a list of one or more numbers (domainID) 34 The “ibm,associativity-reference-points” property contains a list of one or more numbers 52 "ibm,associativity-reference-points" property, Form 2 allows a large number of primary domain 57 "ibm,architecture-vec-5" property. 59 "ibm,numa-lookup-index-table" property contains a list of one or more numbers representing 60 the domainIDs present in the system. The offset of the domainID in this property is 71 "ibm,numa-distance-table" property contains a list of one or more numbers representing the NUMA [all …]
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio-rmu.txt | 21 Definition: A standard property. Specifies the physical address and 29 correctly configured for SRIO accesses. The property should 52 Definition: A standard property. Specifies the physical address and 60 value of the interrupts property consists of one interrupt 64 A pair of IRQs are specified in this property. The first 82 Definition: A standard property. Specifies the physical address and 90 value of the interrupts property consists of one interrupt 94 A pair of IRQs are specified in this property. The first 112 Definition: A standard property. Specifies the physical address and 120 value of the interrupts property consists of one interrupt [all …]
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| D | srio.txt | 18 Definition: A standard property. Specifies the physical address and 26 value of the interrupts property consists of one interrupt 31 property. (Typically shared with port-write). 46 Definition: A standard property. Matches the port id. 51 Definition: A standard property. Utilized to describe the memory mapped 60 correctly configured for SRIO accesses. The property should 65 represented in the property for both transactions. 70 property. Within the pair, the first element represents the
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| /Documentation/devicetree/bindings/phy/ |
| D | nvidia,tegra194-xusb-padctl.yaml | 84 The "status" property is used to enable or disable the use of a pad. 86 order to use the pad and any of its lanes, this property must be set 217 The "status" property is used to enable or disable the use of a port. 219 order to use the port, this property must be set to "okay". 240 description: A boolean property whose presence determines 241 that a port is internal. In the absence of this property 247 A boolean property whole presence indicates that the port 278 description: A boolean property whose presence determines 279 that a port is internal. In the absence of this property 285 A boolean property whole presence indicates that the port [all …]
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,ltc2947.yaml | 29 charge and energy. When an external clock is used, this property must be 35 This property controls the polarity of current that is accumulated to 50 This property controls the Accumulation Dead band which allows to set the 57 This property controls the GPIO polarity. Setting it to one makes the GPIO 58 active high, setting it to zero makets it active low. When this property 67 When set, this property sets the GPIO as input. It is then used to control 71 supported options. This property cannot be used together with
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| /Documentation/devicetree/bindings/powerpc/opal/ |
| D | power-mgt.txt | 28 properties are exposed as arrays. Each entry in the property array 29 provides the value of that property for the idle state associated with 35 otherwise. The length of all the property arrays must be the same. 69 property. If the property is absent, the target residency for 71 respectively by the kernel. On POWER9 this property is required. 76 This property is required on POWER9 and absent on POWER8. 81 entries of ibm,cpu-idle-state-psscr. This property is 111 is an optional property on POWER8 and is absent on 118 property on POWER8 and is absent on POWER9.
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | synopsys,dw-hdmi.yaml | 20 responsible for defining whether each property is required or optional. 28 Width (in bytes) of the registers specified by the reg property. 54 to a system I2C master this property contains a phandle to that I2C 57 This property is deprecated, the system I2C master controller should 58 be referenced through the ddc-i2c-bus property of the HDMI connector
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| /Documentation/devicetree/bindings/sound/ |
| D | cs35l33.txt | 29 begins to when the amplifier disables the PWM outputs. If this property 31 20ms. If this property is set to 0,1,2,3 then ramp times would be 40ms, 39 ADC data word. This property can be set as a value of 0 for bits 15 down 54 LRCLK cycles. If this property is set to 0, 1, 2, or 3 then the memory 66 - cirrus,ldo-path-disable : This is a boolean property. If present, the H/G 71 algorithm switches to the LDO voltage. This property can be set to values 75 - cirrus,vp-hg-auto : This is a boolean property. When set, class H/G VPhg 85 tracking. This property can be set to values from 0 to 3 with rates of 128 90 using VPMON. This property can be set to values from 0 to 6 starting at
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| /Documentation/devicetree/bindings/memory-controllers/ti/ |
| D | emif.txt | 39 - cs1-used : Have this property if CS1 of this EMIF 44 - cal-resistor-per-cs : Have this property if the board has one 47 - hw-caps-read-idle-ctrl: Have this property if the controller 50 - hw-caps-dll-calib-ctrl: Have this property if the controller 53 - hw-caps-ll-interface : Have this property if the controller 56 - hw-caps-temp-alert : Have this property if the controller
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