Searched full:qualcomm (Results 1 – 25 of 534) sorted by relevance
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| /Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,glink-edge.yaml | 7 title: Qualcomm G-Link Edge communication channel nodes
13 Qualcomm G-Link subnode represents communication edge, channels and devices
22 Qualcomm APR (Asynchronous Packet Router)
29 Qualcomm FastRPC
36 Qualcomm GPR (Generic Packet Router)
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| D | qcom,smd-edge.yaml | 7 title: Qualcomm SMD Edge communication channel nodes
13 Qualcomm SMD subnode represents a remote subsystem or a remote processor of
31 Qualcomm APR/GPR (Asynchronous/Generic Packet Router)
38 Qualcomm FastRPC
83 Qualcomm Resource Power Manager (RPM) over SMD.
90 Qualcomm WCNSS for Bluetooth, WiFi and FM radio.
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| D | qcom,pas-common.yaml | 7 title: Qualcomm Peripheral Authentication Service Common Properties
13 Common properties of Qualcomm SoCs Peripheral Authentication Service.
69 Qualcomm Shared Memory subnode which represents communication edge,
76 Qualcomm G-Link subnode which represents communication edge, channels
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| D | qcom,glink-rpm-edge.yaml | 7 title: Qualcomm G-Link RPM edge
10 Qualcomm G-Link edge, a FIFO based mechanism for communication with Resource
11 Power Manager (RPM) on various Qualcomm platforms.
48 Qualcomm Resource Power Manager (RPM) over G-Link
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| D | qcom,sc8180x-pas.yaml | 7 title: Qualcomm SC8180X Peripheral Authentication Service
13 Qualcomm SC8180X SoC Peripheral Authentication Service loads and boots
14 firmware on the Qualcomm DSP Hexagon cores.
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| /Documentation/devicetree/bindings/net/ |
| D | qcom,bam-dmux.yaml | 7 title: Qualcomm BAM Data Multiplexer
14 of modems integrated into many older Qualcomm SoCs, e.g. Qualcomm MSM8916
16 (Qualcomm BAM DMA) and bidirectional interrupts to coordinate power control.
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| /Documentation/devicetree/bindings/clock/ |
| D | qcom,sm6115-gpucc.yaml | 7 title: Qualcomm Graphics Clock & Reset Controller on SM6115
13 Qualcomm graphics clock control module provides clocks, resets and power
14 domains on Qualcomm SoCs.
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| D | qcom,sm6125-gpucc.yaml | 7 title: Qualcomm Graphics Clock & Reset Controller on SM6125
13 Qualcomm graphics clock control module provides clocks and power domains on
14 Qualcomm SoCs.
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| D | qcom,sm8350-videocc.yaml | 7 title: Qualcomm SM8350 Video Clock & Reset Controller
13 Qualcomm video clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs.
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| D | qcom,qcm2290-gpucc.yaml | 7 title: Qualcomm Graphics Clock & Reset Controller on QCM2290
13 Qualcomm graphics clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs.
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| D | qcom,sm6375-gpucc.yaml | 7 title: Qualcomm Graphics Clock & Reset Controller on SM6375
13 Qualcomm graphics clock control module provides clocks, resets and power
14 domains on Qualcomm SoCs.
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| D | qcom,sm8450-gpucc.yaml | 7 title: Qualcomm Graphics Clock & Reset Controller on SM8450
13 Qualcomm graphics clock control module provides the clocks, resets and power
14 domains on Qualcomm SoCs.
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| D | qcom,gcc.yaml | 7 title: Qualcomm Global Clock & Reset Controller Common Properties
14 Common bindings for Qualcomm global clock control module providing the
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| /Documentation/admin-guide/media/ |
| D | qcom_camss.rst | 5 Qualcomm Camera Subsystem driver
11 This file documents the Qualcomm Camera Subsystem driver located under
15 Qualcomm MSM8916/APQ8016 and MSM8996/APQ8096 processors.
20 The driver is implemented using as a reference the Qualcomm Camera Subsystem
24 Qualcomm Camera Subsystem hardware
174 https://developer.qualcomm.com/download/sd410/snapdragon-410-processor-device-specification.pdf
178 https://developer.qualcomm.com/download/sd820e/qualcomm-snapdragon-820e-processor-apq8096sge-device…
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| /Documentation/devicetree/bindings/sound/ |
| D | qcom,q6apm.yaml | 7 title: Qualcomm Audio Process Manager (Q6APM)
26 description: Qualcomm DSP audio ports
32 description: Qualcomm DSP audio ports
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| D | qcom,q6afe.yaml | 7 title: Qualcomm Audio FrontEnd (Q6AFE)
24 description: Qualcomm DSP LPASS clock controller
30 description: Qualcomm DSP audio ports
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| D | qcom,q6apm-dai.yaml | 7 title: Qualcomm Audio Process Manager Digital Audio Interfaces
13 This binding describes the Qualcomm APM DAIs in DSP
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| /Documentation/accel/qaic/ |
| D | index.rst | 4 accel/qaic Qualcomm Cloud AI driver
7 The accel/qaic driver supports the Qualcomm Cloud AI machine learning
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| D | aic080.rst | 4 Qualcomm Cloud AI 80 (AIC080)
10 The Qualcomm Cloud AI 80/AIC080 family of products are a derivative of AIC100.
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom,pcie2-phy.yaml | 7 title: Qualcomm PCIe2 PHY controller
13 The Qualcomm PCIe2 PHY is a Synopsys based phy found in a number of Qualcomm
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| D | qcom,edp-phy.yaml | 8 title: Qualcomm eDP PHY
14 The Qualcomm eDP PHY is found in a number of Qualcomm platform and provides
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| /Documentation/devicetree/bindings/thermal/ |
| D | qcom,spmi-temp-alarm.yaml | 7 title: Qualcomm QPNP PMIC Temperature Alarm
13 QPNP temperature alarm peripherals are found inside of Qualcomm PMIC chips
14 that utilize the Qualcomm SPMI implementation. These peripherals provide an
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| /Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,smem.yaml | 7 title: Qualcomm Shared Memory Manager
14 This binding describes the Qualcomm Shared Memory Manager, a region of
16 Qualcomm platforms.
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| D | qcom,smd.yaml | 7 title: Qualcomm Shared Memory Driver
15 The Qualcomm Shared Memory Driver is a FIFO based communication channel for
16 sending data between the various subsystems in Qualcomm platforms.
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| /Documentation/devicetree/bindings/display/msm/ |
| D | dsi-phy-common.yaml | 7 title: Qualcomm Display DSI PHY Common Properties
13 Common properties for Qualcomm Display DSI PHY.
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