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35 the RES0 and RES1 input pins. In configuration mode, the resolution is36 selected by setting the RES0 and RES1 bits in the control register.38 RES1 RES0 Resolution (Bits)103 GPIO lines connected to the RES0 and RES1 pins. These pins select the105 RES0 and RES1 pins are hard-wired to match the assigned-resolution-bits130 RES1 are hard-wired to match this value.
44 u64 res1 = 0 /* 保留 */
38 u64 res1 = 0 /* Reserved */
31 u32 res1 = 0; /* Reserved */
18 u32 res1 = 0; /* Reserved */