Searched full:reconfiguration (Results 1 – 25 of 36) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | sysfs-class-fpga-manager | 50 reconfiguration hardware.
51 e.g. start reconfiguration
54 reconfiguration hardware.
55 * reconfig incompatible image - reconfiguration image is
58 reconfiguration hardware
60 reconfiguration hardware
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| D | sysfs-class-fpga-region | 6 of the FPGA reconfiguration hardware and image. This value
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| D | sysfs-driver-intel-m10-bmc-sec-update | 16 reconfiguration region if one is programmed, else it
44 signing keys for the partial reconfiguration region. The
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| D | sysfs-bus-dax | 51 part of the reconfiguration process.
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| /Documentation/devicetree/bindings/fpga/ |
| D | fpga-region.yaml | 25 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
38 Full Reconfiguration
41 Partial Reconfiguration (PR)
46 Partial Reconfiguration Region (PRR)
48 * A PRR is a specific section of an FPGA reserved for reconfiguration.
69 * During Full Reconfiguration, hardware bridges between the host and FPGA
71 * During Partial Reconfiguration of a specific region, that region's bridge
85 * An FPGA image that is designed to do full reconfiguration of the FPGA.
86 * A base image may set up a set of partial reconfiguration regions that may
151 reconfiguration. It must include a phandle to an FPGA Manager. The base
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| D | altera-pr-ip.txt | 1 Altera Arria10 Partial Reconfiguration IP
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| D | lattice,sysconfig.yaml | 14 have Slave Serial Peripheral Interface. Only full reconfiguration is
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| D | xlnx,pr-decoupler.yaml | 25 Reconfigurable Partition when it is undergoing dynamic reconfiguration,
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| /Documentation/driver-api/fpga/ |
| D | intro.rst | 39 bridge in FPGA fabric that surrounds a partial reconfiguration region
51 FPGA in full reconfiguration or to a partial reconfiguration region.
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| D | fpga-region.rst | 35 reconfiguration.
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| D | fpga-mgr.rst | 21 built for full or partial reconfiguration.
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| /Documentation/driver-api/soundwire/ |
| D | error_handling.rst | 50 Errors during global reconfiguration sequences are extremely difficult to
57 such as frame reconfiguration would be handled at different times). A global
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| /Documentation/fpga/ |
| D | dfl.rst | 17 enables system level management functions such as FPGA reconfiguration.
71 Feature Register Set, e.g. FME Partial Reconfiguration Feature Register Set.
199 The FPGA Management Engine performs reconfiguration and other infrastructure
281 reset at any time, e.g. during DMA or Partial Reconfiguration. But it should
342 b) Partial Reconfiguration. The FME driver creates FPGA manager, FPGA
346 reconfiguration of the PR bitstream to the given port.
360 Partial Reconfiguration
363 reconfiguration of a PR bitstream file. The PR bitstream file must have been
365 (port) of the FPGA, otherwise, the reconfiguration operation will fail and
369 userspace before calling the reconfiguration IOCTL.
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| /Documentation/userspace-api/gpio/ |
| D | gpio-v2-line-set-config-ioctl.rst | 43 restriction that a direction flag must be set to enable reconfiguration.
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| D | gpio-v2-lineinfo-changed-read.rst | 47 info changed events. Subsequently, a request, release, or reconfiguration
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| D | gpio-lineinfo-changed-read.rst | 51 info changed events. Subsequently, a request, release, or reconfiguration
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| /Documentation/driver-api/ |
| D | slimbus.rst | 22 reconfiguration sequence is a broadcast message announced to all devices)
105 SLIMbus mandates that a reconfiguration sequence (known as clock-pause) be
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| /Documentation/devicetree/bindings/clock/ |
| D | microchip,mpfs-clkcfg.yaml | 33 Block of registers responsible for dynamic reconfiguration of the mss
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| /Documentation/userspace-api/media/drivers/ |
| D | omap3isp-uapi.rst | 174 driver supports reconfiguration while streaming, it does not support a
175 reconfiguration which requires bigger buffer size than what is already
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| /Documentation/devicetree/bindings/tpm/ |
| D | ibm,vtpm.yaml | 58 present only if Dynamic Reconfiguration (DR) Connector is enabled
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| /Documentation/filesystems/ |
| D | mount_api.rst | 64 The creation and reconfiguration of a superblock is governed by a filesystem
280 information stored in the filesystem context (reconfiguration goes via a
294 Called to effect reconfiguration of a superblock using information stored
322 reconfiguration (FS_CONTEXT_FOR_RECONFIGURE) in which case it indicates
369 In the case of reconfiguration, the target superblock will be accessible
384 Called to apply any reconfiguration to an LSM's context. It must not
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| /Documentation/userspace-api/media/v4l/ |
| D | ext-ctrls-jpeg.rst | 69 without a need for direct reconfiguration of luminance and chrominance
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| /Documentation/security/ |
| D | SCTP.rst | 92 SCTP_PARAM_SET_PRIMARY - Reconfiguration is enabled as explained below.
95 To support Dynamic Address Reconfiguration the following parameters must be
255 Reconfiguration is enabled.
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| /Documentation/devicetree/bindings/ |
| D | xilinx.txt | 132 (ICAP). The ICAP enables partial reconfiguration of the FPGA,
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| /Documentation/admin-guide/media/ |
| D | fimc.rst | 58 Reconfiguration is done by enabling/disabling media links created by the driver
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