Searched full:sdr25 (Results 1 – 7 of 7) sorted by relevance
| /Documentation/devicetree/bindings/mmc/ |
| D | sdhci-am654.yaml | 85 ti,otap-del-sel-sdr25:
86 description: Output tap delay for SD UHS SDR25 timing
155 ti,itap-del-sel-sdr25:
156 description: Input tap delay for SD UHS SDR25 timing
|
| D | cdns,sdhci.yaml | 57 cdns,phy-input-delay-sd-uhs-sdr25:
58 description: Value of the delay in the input path for SD UHS SDR25 timing
|
| D | sdhci-omap.txt | 18 - pinctrl-names: Should be subset of "default", "hs", "sdr12", "sdr25", "sdr50",
|
| D | socionext,uniphier-sd.yaml | 115 sd-uhs-sdr25;
|
| D | k3-dw-mshc.txt | 60 sd-uhs-sdr25;
|
| D | mmc-controller.yaml | 145 sd-uhs-sdr25:
148 SD UHS SDR25 speed is supported.
|
| D | marvell,xenon-sdhci.yaml | 128 always occur with PHY enabled in eMMC HS SDR, SD SDR12, SD SDR25,
|