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/Documentation/devicetree/bindings/spmi/
Dhisilicon,hisi-spmi-controller.yaml4 $id: http://devicetree.org/schemas/spmi/hisilicon,hisi-spmi-controller.yaml#
7 title: HiSilicon SPMI controller
13 The HiSilicon SPMI BUS controller is found on some Kirin-based designs.
14 It is a MIPI System Power Management (SPMI) controller.
17 Documentation/devicetree/bindings/mfd/hisilicon,hi6421-spmi-pmic.yaml.
20 - $ref: spmi.yaml#
25 pattern: "spmi@[0-9a-f]"
28 const: hisilicon,kirin970-spmi-controller
33 hisilicon,spmi-channel:
36 number of the Kirin 970 SPMI channel where the SPMI devices are connected.
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Dmtk,spmi-mtk-pmif.yaml4 $id: http://devicetree.org/schemas/spmi/mtk,spmi-mtk-pmif.yaml#
7 title: Mediatek SPMI Controller
13 On MediaTek SoCs the PMIC is connected via SPMI and the controller allows
14 for multiple SoCs to control a single SPMI master.
17 - $ref: spmi.yaml
23 - mediatek,mt6873-spmi
24 - mediatek,mt8195-spmi
27 - mediatek,mt8186-spmi
28 - const: mediatek,mt8195-spmi
67 spmi: spmi@10027000 {
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Dspmi.yaml4 $id: http://devicetree.org/schemas/spmi/spmi.yaml#
7 title: System Power Management Interface (SPMI) Controller
13 The System Power Management (SPMI) controller is a 2-wire bus defined
16 SPMI controllers are modelled in device tree using a generic set of
20 Each SPMI controller has zero or more child nodes (up to 16 ones), each
25 pattern: "^spmi@.*"
60 #include <dt-bindings/spmi/spmi.h>
62 spmi@0 {
Dqcom,x1e80100-spmi-pmic-arb.yaml4 $id: http://devicetree.org/schemas/spmi/qcom,x1e80100-spmi-pmic-arb.yaml#
7 title: Qualcomm X1E80100 SPMI Controller (PMIC Arbiter v7)
13 The X1E80100 SPMI PMIC Arbiter implements HW version 7 and it's an SPMI
15 devices to control up to 2 SPMI separate buses.
22 const: qcom,x1e80100-spmi-pmic-arb
59 "^spmi@[a-f0-9]+$":
61 $ref: /schemas/spmi/spmi.yaml
108 spmi: arbiter@c400000 {
109 compatible = "qcom,x1e80100-spmi-pmic-arb";
122 spmi_bus0: spmi@c42d000 {
Dqcom,spmi-pmic-arb.yaml4 $id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
7 title: Qualcomm SPMI Controller (PMIC Arbiter)
13 The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
15 devices to control a single SPMI master.
21 - $ref: spmi.yaml
25 const: qcom,spmi-pmic-arb
93 SPMI bus instance. only applicable to PMIC arbiter version 7 and beyond.
107 spmi@fc4cf000 {
108 compatible = "qcom,spmi-pmic-arb";
/Documentation/devicetree/bindings/mfd/
Dqcom,spmi-pmic.yaml4 $id: http://devicetree.org/schemas/mfd/qcom,spmi-pmic.yaml#
7 title: Qualcomm SPMI PMICs multi-function device
11 to the chip via the SPMI (System Power Management Interface) bus.
13 16-bit SPMI peripheral address space into 256 smaller fixed-size regions, 256 bytes
16 The Qualcomm SPMI series includes the PM8941, PM8841, PMA8084, PM8998 and other
17 PMICs. These PMICs use a "QPNP" scheme through SPMI interface.
18 QPNP is effectively a partitioning scheme for dividing the SPMI extended
100 - const: qcom,spmi-pmic
118 $ref: /schemas/regulator/qcom,spmi-regulator.yaml#
128 - $ref: /schemas/iio/adc/qcom,spmi-iadc.yaml#
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Dhisilicon,hi6421-spmi-pmic.yaml4 $id: http://devicetree.org/schemas/mfd/hisilicon,hi6421-spmi-pmic.yaml#
7 title: HiSilicon 6421v600 SPMI PMIC
14 (SPMI) bus. It provides interrupts and power supply.
19 The SPMI controller part is provided by
20 Documentation/devicetree/bindings/spmi/hisilicon,hisi-spmi-controller.yaml
27 const: hisilicon,hi6421v600-spmi
62 #include <dt-bindings/spmi/spmi.h>
64 spmi {
69 compatible = "hisilicon,hi6421v600-spmi";
Dti,tps6594.yaml33 Identify the primary PMIC on SPMI bus.
36 accomplished through a SPMI bus: the primary PMIC is the controller
37 device on the SPMI bus, and the secondary PMICs are the target devices
38 on the SPMI bus.
/Documentation/devicetree/bindings/iio/adc/
Dqcom,spmi-vadc.yaml4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-vadc.yaml#
7 title: Qualcomm's SPMI PMIC ADC
14 SPMI PMIC voltage ADC (VADC) provides interface to clients to read
16 SPMI PMIC5/PMIC7 voltage ADC (ADC) provides interface to clients to read
24 - const: qcom,spmi-adc-rev2
26 - qcom,spmi-vadc
27 - qcom,spmi-adc5
28 - qcom,spmi-adc-rev2
29 - qcom,spmi-adc7
32 description: VADC base address in the SPMI PMIC register map
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Dqcom,spmi-iadc.yaml4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-iadc.yaml#
7 title: Qualcomm's SPMI PMIC current ADC
25 - const: qcom,spmi-iadc
28 description: IADC base address in the SPMI PMIC register map
59 compatible = "qcom,pm8941-iadc", "qcom,spmi-iadc";
Dqcom,spmi-rradc.yaml4 $id: http://devicetree.org/schemas/iio/adc/qcom,spmi-rradc.yaml#
7 title: Qualcomm's SPMI PMIC Round Robin ADC
13 The Qualcomm SPMI Round Robin ADC (RRADC) provides interface to clients to
/Documentation/devicetree/bindings/thermal/
Dqcom-spmi-adc-tm5.yaml4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm5.yaml#
7 title: Qualcomm's SPMI PMIC ADC Thermal Monitoring
16 - qcom,spmi-adc-tm5
17 - qcom,spmi-adc-tm5-gen2
135 const: qcom,spmi-adc-tm5
148 const: qcom,spmi-adc-tm5-gen2
166 #include <dt-bindings/iio/qcom,spmi-vadc.h>
174 compatible = "qcom,spmi-adc5";
190 compatible = "qcom,spmi-adc-tm5";
207 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
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Dqcom,spmi-temp-alarm.yaml4 $id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#
14 that utilize the Qualcomm SPMI implementation. These peripherals provide an
22 const: qcom,spmi-temp-alarm
57 compatible = "qcom,spmi-temp-alarm";
Dqcom-spmi-adc-tm-hc.yaml4 $id: http://devicetree.org/schemas/thermal/qcom-spmi-adc-tm-hc.yaml#
7 title: Qualcomm's SPMI PMIC ADC HC Thermal Monitoring
15 const: qcom,spmi-adc-tm-hc
113 #include <dt-bindings/iio/qcom,spmi-vadc.h>
121 compatible = "qcom,spmi-adc-rev2";
134 compatible = "qcom,spmi-adc-tm-hc";
/Documentation/devicetree/bindings/clock/
Dqcom,spmi-clkdiv.yaml4 $id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
7 title: Qualcomm SPMI PMIC clock divider
14 Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of
20 const: qcom,spmi-clkdiv
57 compatible = "qcom,spmi-clkdiv";
/Documentation/devicetree/bindings/watchdog/
Dqcom,pm8916-wdt.yaml31 #include <dt-bindings/spmi/spmi.h>
33 spmi {
38 compatible = "qcom,pm8916", "qcom,spmi-pmic";
/Documentation/devicetree/bindings/nvmem/
Dqcom,spmi-sdam.yaml4 $id: http://devicetree.org/schemas/nvmem/qcom,spmi-sdam.yaml#
7 title: Qualcomm Technologies, Inc. SPMI SDAM
24 - qcom,spmi-sdam
45 compatible = "qcom,spmi-sdam";
/Documentation/devicetree/bindings/rtc/
Dqcom-pm8xxx-rtc.yaml65 #include <dt-bindings/spmi/spmi.h>
67 spmi {
72 compatible = "qcom,pm8941", "qcom,spmi-pmic";
/Documentation/devicetree/bindings/power/reset/
Dqcom,pon.yaml29 Specifies the SPMI base address for the PON (power-on) peripheral. For
113 #include <dt-bindings/spmi/spmi.h>
115 spmi@c440000 {
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,pbs.yaml35 #include <dt-bindings/spmi/spmi.h>
/Documentation/devicetree/bindings/leds/
Dqcom,spmi-flash-led.yaml4 $id: http://devicetree.org/schemas/leds/qcom,spmi-flash-led.yaml#
31 - const: qcom,spmi-flash-led
98 compatible = "qcom,pm8350c-flash-led", "qcom,spmi-flash-led";
/Documentation/devicetree/bindings/phy/
Dqcom,snps-eusb2-repeater.yaml67 #include <dt-bindings/spmi/spmi.h>
/Documentation/devicetree/bindings/sound/
Dqcom,pm8916-wcd-analog-codec.yaml106 #include <dt-bindings/spmi/spmi.h>
109 compatible = "qcom,pm8916", "qcom,spmi-pmic";
/Documentation/devicetree/bindings/regulator/
Dmt6315-regulator.yaml13 The MT6315 is a power management IC (PMIC) configurable with SPMI.
/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-mpp.yaml31 - const: qcom,spmi-mpp
167 compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";

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