Searched full:ssp (Results 1 – 16 of 16) sorted by relevance
| /Documentation/devicetree/bindings/spi/ |
| D | marvell,mmp2-ssp.yaml | 5 $id: http://devicetree.org/schemas/spi/marvell,mmp2-ssp.yaml#
8 title: PXA2xx SSP SPI Controller
16 - marvell,mmp2-ssp
17 - mrvl,ce4100-ssp
18 - mvrl,pxa168-ssp
19 - mrvl,pxa25x-ssp
21 - mrvl,pxa27x-ssp
22 - mrvl,pxa3xx-ssp
23 - mrvl,pxa910-ssp
65 const: marvell,mmp2-ssp
[all …]
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| D | mxs-spi.yaml | 7 title: Freescale MX233/MX28 SSP/SPI
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| /Documentation/devicetree/bindings/sound/ |
| D | mrvl,pxa-ssp.txt | 1 Marvell PXA SSP CPU DAI bindings
5 compatible Must be "mrvl,pxa-ssp-dai"
6 port A phandle reference to a PXA ssp upstream device
20 ssp1: ssp@41000000 {
21 compatible = "mrvl,pxa3xx-ssp";
24 clock-names = "pxa27x-ssp.0";
30 compatible = "mrvl,pxa-ssp-dai";
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| D | brcm,cygnus-audio.txt | 22 SSP Subnode properties:
23 - reg: The index of ssp port interface to use
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,dove-pinctrl.txt | 30 mpp10 10 gpio, pmu, ssp(sclk), pmu*
36 ssp(extclk), pmu*
37 mpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu*
38 mpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu*
47 uart1(cts), ssp(sfrm)
49 lcd-spi(mosi), uart1(cts), ssp(txd)
51 lcd-spi(sck), ssp(sclk)
55 mpp_audio1 52-57 gpio, i2s1/spdifo, i2s1, spdifo, twsi, ssp/spdifo, ssp,
56 ssp/twsi
85 - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios
[all …]
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| /Documentation/devicetree/bindings/misc/ |
| D | olpc,xo1.75-ec.yaml | 17 "ready-gpios" property of the SSP binding as documented in:
18 <Documentation/devicetree/bindings/spi/marvell,mmp2-ssp.yaml>.
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| /Documentation/devicetree/bindings/soc/cirrus/ |
| D | cirrus,ep9301-syscon.yaml | 63 enum: [ ssp, ac97, i2s_on_ssp, i2s_on_ac97, pwm1, gpio1agrp,
92 groups = "ssp";
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| /Documentation/sound/hd-audio/ |
| D | intel-multi-link.rst | 243 SSP HDaudio extended link mapping
253 - number of sublinks (SSP IP instances) in LCAP.LSCOUNT
257 - move of SHIM and SSP IP registers to different offsets, with no
261 Extended structure for SSP (assuming 3 instances of the IP)
295 … | | SSP SHIM | |
298 … +---------------+ | | SSP IP | |
300 … +---------------+ | | SSP SHIM | |
305 | ID = 0xC0 | | | SSP SHIM |
308 +---------------+ | | SSP IP |
310 +---------------+ | SSP SHIM |
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| /Documentation/arch/x86/ |
| D | shstk.rst | 136 shadow stack. Today this is only the old SSP (shadow stack pointer), pushed
137 in a special format with bit 63 set. On sigreturn this old SSP token is
144 |1...old SSP| - Pointer to old pre-signal ssp in sigframe token format
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| /Documentation/devicetree/bindings/mmc/ |
| D | mxs-mmc.yaml | 13 The Freescale MXS Synchronous Serial Ports (SSP) can act as a MMC controller
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| /Documentation/devicetree/bindings/clock/ |
| D | imx23-clock.yaml | 52 ssp 33
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| /Documentation/devicetree/bindings/net/ |
| D | microchip,enc28j60.txt | 30 ssp2: ssp@80014000 {
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| /Documentation/driver-api/soundwire/ |
| D | summary.rst | 128 Synchronization Point (SSP). The "sdw_master_ops" structure abstracts the
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| /Documentation/arch/arm/pxa/ |
| D | mfp.rst | 51 internal controllers like PWM, SSP and UART, with 128 internal signals
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| /Documentation/sound/soc/ |
| D | dpcm.rst | 183 .cpu_dai_name = "ssp-dai.0",
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| /Documentation/spi/ |
| D | spi-summary.rst | 53 half-duplex SPI, for request/response protocols), SSP ("Synchronous
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