Searched full:stb (Results 1 – 25 of 27) sorted by relevance
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| /Documentation/devicetree/bindings/reset/ |
| D | brcm,brcmstb-reset.yaml | 7 title: Broadcom STB SW_INIT-style reset controller
10 Broadcom STB SoCs have a SW_INIT-style reset controller with separate
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| /Documentation/devicetree/bindings/rtc/ |
| D | brcm,brcmstb-waketimer.yaml | 7 title: Broadcom STB wake-up Timer
13 The Broadcom STB wake-up timer provides a 27Mhz resolution timer, with the
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| /Documentation/devicetree/bindings/usb/ |
| D | hisilicon,histb-xhci.txt | 1 HiSilicon STB xHCI
3 The device node for HiSilicon STB xHCI host controller
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| D | starfive,jh7110-usb.yaml | 48 - const: stb
97 clock-names = "lpm", "stb", "apb", "axi", "utmi_apb";
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| D | brcm,bcm7445-ehci.yaml | 7 title: Broadcom STB USB EHCI Controller
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| D | generic-xhci.yaml | 30 - description: Broadcom STB SoCs with xHCI
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| /Documentation/devicetree/bindings/pci/ |
| D | hisilicon-histb-pcie.txt | 1 HiSilicon STB PCIe host bridge DT description
3 The HiSilicon STB PCIe host controller is based on the DesignWare PCIe core.
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| D | brcm,stb-pcie.yaml | 4 $id: http://devicetree.org/schemas/pci/brcm,stb-pcie.yaml#
18 - brcm,bcm7211-pcie # Broadcom STB version of RPi4
24 - brcm,bcm7712-pcie # Broadcom STB sibling of Rpi 5
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| /Documentation/arch/arm/sti/ |
| D | stih407-overview.rst | 10 and IP-STB markets.
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| D | stih418-overview.rst | 10 and IP-STB markets.
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| /Documentation/devicetree/bindings/thermal/ |
| D | brcm,avs-tmon.yaml | 7 title: Broadcom STB thermal management
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | brcm,dpfe-cpu.yaml | 7 title: DDR PHY Front End (DPFE) for Broadcom STB
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| D | brcm,brcmstb-memc-ddr.yaml | 7 title: Memory controller (MEMC) for Broadcom STB
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| /Documentation/devicetree/bindings/phy/ |
| D | hisilicon,hi3798cv200-combphy.yaml | 7 title: HiSilicon STB PCIE/SATA/USB3 PHY
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| D | brcm,brcmstb-usb-phy.yaml | 7 title: Broadcom STB USB PHY
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| /Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 43 A Broadcom STB SoC typically has a number of independent memory controllers,
147 The Broadcom STB chips contain a timer block with several general purpose
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,brcmstb.txt | 1 ARM Broadcom STB platforms Device Tree Bindings
13 model = "Broadcom STB (bcm7445)";
146 A Broadcom STB SoC typically has a number of independent memory controllers,
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| /Documentation/devicetree/bindings/i2c/ |
| D | brcm,brcmstb-i2c.yaml | 7 title: Broadcom STB BSC IIC Master Controller
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| /Documentation/userspace-api/media/dvb/ |
| D | intro.rst | 69 Components of a Digital TV card/STB
71 A Digital TV card or set-top-box (STB) usually consists of the
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| /Documentation/sound/soc/ |
| D | dai.rst | 26 I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,armada-39x-pinctrl.txt | 30 mpp12 12 gpio, pcie0(rstout), dev(ad14), led(stb)
66 mpp46 46 gpio, ref(clk), pcie0(rstout), ua1(txd), led(stb)
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | cp110-system-controller.txt | 99 mpp8 8 gpio, dev(ad9), ge0(txd1), spi0(csn0), spi1(csn0), uart0(cts), led(stb), uart2(rxd), ptp(pcl…
120 …(rxd1), spi0(csn6), pcie1(clkreq), ptp(clk), mss_i2c(sda), sata0(present_act), uart0(rxd), led(stb)
144 mpp53 53 gpio, ge1(rxd2), ptp(clk), spi1(csn3), uart1(rxd), led(stb), sdio(led)
150 mpp59 59 gpio, mss_gpio7, synce2(clk), tdm(fsync), au(i2slrclk), spi0(csn0), uart0(cts), led(stb), …
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| /Documentation/devicetree/bindings/gpio/ |
| D | brcm,brcmstb-gpio.yaml | 7 title: Broadcom STB "UPG GIO" GPIO controller
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| /Documentation/devicetree/bindings/mtd/ |
| D | brcm,brcmnand.yaml | 7 title: Broadcom STB NAND Controller
21 This controller was originally designed for STB SoCs (BCM7xxx) but is now
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| /Documentation/admin-guide/media/ |
| D | bttv-cardlist.rst | 30 - STB, Gateway P/N 6000699 (bt848)
178 - STB TV PCI FM, Gateway P/N 6000704 (bt878), 3Dfx VoodooTV 100
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