| /Documentation/devicetree/bindings/soc/sti/ |
| D | st,sti-syscon.yaml | 21 - st,stih407-core-syscfg
22 - st,stih407-flash-syscfg
23 - st,stih407-front-syscfg
24 - st,stih407-lpm-syscfg
25 - st,stih407-rear-syscfg
26 - st,stih407-sbc-reg-syscfg
27 - st,stih407-sbc-syscfg
51 compatible = "st,stih407-sbc-syscfg", "syscon";
|
| /Documentation/devicetree/bindings/arm/stm32/ |
| D | st,stm32-syscon.yaml | 19 - st,stm32-syscfg
23 - st,stm32mp157-syscfg
24 - st,stm32mp25-syscfg
46 - st,stm32mp157-syscfg
57 syscfg: syscon@50020000 {
58 compatible = "st,stm32mp157-syscfg", "syscon";
60 clocks = <&rcc SYSCFG>;
|
| /Documentation/devicetree/bindings/mfd/ |
| D | syscon.yaml | 64 - fsl,imx93-aonmix-ns-syscfg
65 - fsl,imx93-wakeupmix-syscfg
83 - mediatek,mt2701-pctl-a-syscfg
84 - mediatek,mt2712-pctl-a-syscfg
85 - mediatek,mt6397-pctl-pmic-syscfg
86 - mediatek,mt8135-pctl-a-syscfg
87 - mediatek,mt8135-pctl-b-syscfg
88 - mediatek,mt8173-pctl-a-syscfg
89 - mediatek,mt8365-syscfg
161 - fsl,imx93-aonmix-ns-syscfg
[all …]
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | st,stih407-irq-syscfg.yaml | 4 $id: http://devicetree.org/schemas/interrupt-controller/st,stih407-irq-syscfg.yaml#
19 const: st,stih407-irq-syscfg
21 st,syscfg:
48 - st,syscfg
57 irq-syscfg {
58 compatible = "st,stih407-irq-syscfg";
59 st,syscfg = <&syscfg_cpu>;
|
| /Documentation/devicetree/bindings/remoteproc/ |
| D | st,stm32-rproc.yaml | 37 st,syscfg-holdboot:
46 st,syscfg-tz:
105 st,syscfg-pdds:
115 st,syscfg-m4-state:
125 st,syscfg-rsc-tbl:
156 - st,syscfg-holdboot
159 st,syscfg-holdboot: false
174 st,syscfg-holdboot = <&rcc 0x10C 0x1>;
175 st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>;
176 st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>;
[all …]
|
| D | st-rproc.txt | 20 - st,syscfg System configuration register which holds the boot vector
40 st,syscfg = <&syscfg_core 0x228>;
|
| /Documentation/devicetree/bindings/phy/ |
| D | st,stih407-usb2-phy.yaml | 21 st,syscfg:
22 description: Phandle to the syscfg bank
26 - description: phandle to syscfg
45 - st,syscfg
58 st,syscfg = <&syscfg_core 0x100 0xf4>;
|
| D | phy-miphy28lp.txt | 9 - st,syscfg : Should be a phandle of the system configuration register group
29 - st,syscfg : Offset of the parent configuration register.
50 st,syscfg = <&syscfg_core>;
63 st,syscfg = <0x114 0x818 0xe0 0xec>;
78 st,syscfg = <0x118 0x81c 0xe4 0xf0>;
92 st,syscfg = <0x11c 0x820>;
|
| D | intel,combo-phy.yaml | 48 intel,syscfg:
83 - intel,syscfg
105 intel,syscfg = <&sysconf 0>;
|
| D | phy-miphy365x.txt | 9 - st,syscfg : Phandle / integer array property. Phandle of sysconfig group
43 st,syscfg = <&syscfg_rear 0x824 0x828>;
57 reg-names = "sata", "pcie", "syscfg";
|
| /Documentation/devicetree/bindings/power/reset/ |
| D | st-reset.txt | 5 - st,syscfg: should be a phandle of the syscfg node.
10 st,syscfg = <&syscfg_sbc_reg>;
|
| /Documentation/devicetree/bindings/regulator/ |
| D | st,stm32-booster.yaml | 25 st,syscfg:
34 - st,syscfg
43 st,syscfg = <&syscfg>;
|
| /Documentation/devicetree/bindings/i2c/ |
| D | st,stm32-i2c.yaml | 32 st,syscfg-fmp: false
118 st,syscfg-fmp:
119 description: Use to set Fast Mode Plus bit within SYSCFG when Fast Mode
124 - description: phandle to syscfg
125 - description: register offset within syscfg
190 st,syscfg-fmp = <&syscfg 0x4 0x2>;
|
| /Documentation/devicetree/bindings/watchdog/ |
| D | st_lpc_wdt.txt | 24 - st,syscfg : Phandle to syscfg node used to enable watchdog and configure
37 st,syscfg = <&syscfg_core>;
|
| /Documentation/devicetree/bindings/usb/ |
| D | dwc3-st.txt | 9 - reg : glue logic base address and USB syscfg ctrl register offset
10 - reg-names : should be "reg-glue" and "syscfg-reg"
47 reg-names = "reg-glue", "syscfg-reg";
48 st,syscfg = <&syscfg_core>;
|
| /Documentation/devicetree/bindings/sound/ |
| D | st,sti-asoc-card.txt | 18 - st,syscfg: phandle to boot-device system configuration registers
57 st,syscfg = <&syscfg_core>;
69 st,syscfg = <&syscfg_core>;
80 st,syscfg = <&syscfg_core>;
91 st,syscfg = <&syscfg_core>;
105 - st,syscfg: phandle to boot-device system configuration registers.
|
| /Documentation/devicetree/bindings/mtd/ |
| D | st-fsm.txt | 11 - st,syscfg : Phandle to boot-device system configuration registers
21 st,syscfg = <&syscfg_rear>;
|
| /Documentation/devicetree/bindings/pinctrl/ |
| D | mediatek,mt65xx-pinctrl.yaml | 53 Should be phandles of the syscfg node.
139 syscfg_pctl_a: syscfg-pctl-a@10005000 {
140 compatible = "mediatek,mt8135-pctl-a-syscfg", "syscon";
144 syscfg_pctl_b: syscfg-pctl-b@1020c020 {
145 compatible = "mediatek,mt8135-pctl-b-syscfg", "syscon";
|
| D | pinctrl-st.txt | 34 - st,syscfg : Should be a phandle of the syscfg node.
85 st,syscfg = <&syscfg_sbc>;
|
| /Documentation/devicetree/bindings/rtc/ |
| D | st,stm32-rtc.yaml | 35 st,syscfg:
97 - st,syscfg
116 - st,syscfg
158 st,syscfg = <&pwrcfg 0x00 0x100>;
|
| /Documentation/devicetree/bindings/clock/ |
| D | st,stm32h7-rcc.txt | 26 - st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
38 st,syscfg = <&pwrcfg>;
|
| /Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 173 st,syscon = <&syscfg 0x4>;
190 st,syscon = <&syscfg 0x4>;
206 st,syscon = <&syscfg 0x4>;
|
| /Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 81 st,syscfg:
130 st,syscfg: false
161 st,syscfg: false
547 st,syscfg = <&syscfg>;
584 st,syscfg = <&syscfg>;
|
| /Documentation/trace/coresight/ |
| D | coresight-config.rst | 139 Mount configfs as normal and the 'cs-syscfg' subsystem will appear::
142 cs-syscfg stp-policy
146 $ cd cs-syscfg/
|
| /Documentation/devicetree/bindings/dma/ |
| D | st_fdma.txt | 73 st,syscfg = <&syscfg_core>;
|