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/Documentation/hwmon/
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
33 Pins AIN0 to AIN3 are single ended inputs for channels 0 to 3
35 - mode 1 : three differential inputs
39 - mode 2 : single ended and differential mixed
[all …]
Dads7828.rst6 * Texas Instruments/Burr-Brown ADS7828
23 - Steve Hardy <shardy@redhat.com>
24 - Vivien Didelot <vivien.didelot@savoirfairelinux.com>
25 - Guillaume Roguez <guillaume.roguez@savoirfairelinux.com>
28 -------------
34 set to true for differential mode, false for default single ended mode.
45 If no structure is provided, the configuration defaults to single ended
49 -----------
53 The ADS7828 device is a 12-bit 8-channel A/D converter, while the ADS7830 does
54 8-bit sampling.
[all …]
Dmcp3021.rst22 - Mingkai Hu
23 - Sven Schuchmann <schuchmann@schleissheimer.de>
26 -----------
32 converter (ADC) with 10-bit resolution. The MCP3221 has 12-bit resolution.
34 These devices provide one single-ended input with very low power consumption.
35 Communication to the MCP3021/MCP3221 is performed using a 2-wire I2C
/Documentation/devicetree/bindings/sound/
Dpcm3060.txt7 - compatible: "ti,pcm3060"
9 - reg : the I2C address of the device for I2C, the chip select
14 - ti,out-single-ended: "true" if output is single-ended;
22 ti,out-single-ended = "true";
Dcs42l52.txt5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
29 - cirrus,micbias-lvl: Set the output voltage level on the MICBIAS Pin
42 reset-gpio = <&gpio 10 0>;
[all …]
Dak5386.txt1 AK5386 Single-ended 24-Bit 192kHz delta-sigma ADC
7 - compatible : "asahi-kasei,ak5386"
11 - reset-gpio : a GPIO spec for the reset/power down pin.
13 - va-supply : a regulator spec, providing 5.0V
14 - vd-supply : a regulator spec, providing 3.3V
19 compatible = "asahi-kasei,ak5386";
20 reset-gpio = <&gpio0 23>;
21 va-supply = <&vdd_5v0_reg>;
22 vd-supply = <&vdd_3v3_reg>;
Dnuvoton,nau8821.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Seven Lee <wtli@nuvoton.com>
13 - $ref: dai-common.yaml#
25 nuvoton,jkdet-enable:
29 nuvoton,jkdet-pull-enable:
30 description: Enable JKDET pin pull. If set - pin pull enabled,
34 nuvoton,jkdet-pull-up:
35 description: Pull-up JKDET pin. If set then JKDET pin is pull up,
[all …]
Drealtek,rt5677.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
30 - $ref: dai-common.yaml#
42 gpio-controller: true
44 '#gpio-cells':
47 realtek,pow-ldo2-gpio:
51 realtek,reset-gpio:
55 realtek,gpio-config:
[all …]
Drt5660.txt7 - compatible : "realtek,rt5660".
9 - reg : The I2C address of the device.
13 - clocks: The phandle of the master clock to the CODEC
14 - clock-names: Should be "mclk"
16 - realtek,in1-differential
17 - realtek,in3-differential
18 Boolean. Indicate MIC1/3 input are differential, rather than single-ended.
20 - realtek,poweroff-in-suspend
24 - realtek,dmic1-data-pin
Dwlf,wm8994.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
11 - patches@opensource.cirrus.com
25 - wlf,wm1811
26 - wlf,wm8994
27 - wlf,wm8958
36 clock-names:
39 - const: MCLK1
[all …]
/Documentation/devicetree/bindings/hwmon/
Dti,adc128d818.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Javier Carrasco <javier.carrasco.cruz@gmail.com>
14 The ADC128D818 is a 12-Bit, 8-Channel Analog to Digital Converter (ADC)
31 Mode 0 - 7 single-ended voltage readings (IN0-IN6), 1 temperature
33 Mode 1 - 8 single-ended voltage readings (IN0-IN7), no temperature.
34 Mode 2 - 4 pseudo-differential voltage readings
35 (IN0-IN1, IN3-IN2, IN4-IN5, IN7-IN6), 1 temperature reading (internal).
36 Mode 3 - 4 single-ended voltage readings (IN0-IN3), 2 pseudo-differential
[all …]
/Documentation/devicetree/bindings/iio/temperature/
Dadi,ltc2983.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices LTC2983, LTC2986, LTM2985 Multi-sensor Temperature system
10 - Nuno Sá <nuno.sa@analog.com>
13 Analog Devices LTC2983, LTC2984, LTC2986, LTM2985 Multi-Sensor Digital
16 https://www.analog.com/media/en/technical-documentation/data-sheets/2983fc.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/2984fb.pdf
18 https://www.analog.com/media/en/technical-documentation/data-sheets/29861fa.pdf
19 https://www.analog.com/media/en/technical-documentation/data-sheets/ltm2985.pdf
[all …]
/Documentation/devicetree/bindings/iio/frequency/
Dadi,admv4420.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sá <nuno.sa@analog.com>
14 mixer with an integrated fractional-N synthesizer, ideally suited
20 - adi,admv4420
25 spi-max-frequency:
28 adi,lo-freq-khz:
32 adi,ref-ext-single-ended-en:
37 - compatible
[all …]
Dadi,admv1013.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1013
26 spi-max-frequency:
34 clock-names:
36 - const: lo_in
38 vcm-supply:
42 vcc-drv-supply:
[all …]
Dadi,admv1014.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
21 - adi,admv1014
26 spi-max-frequency:
32 clock-names:
34 - const: lo_in
38 vcm-supply:
40 Common-mode voltage regulator.
[all …]
/Documentation/devicetree/bindings/iio/adc/
Dadc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Cameron <jic23@kernel.org>
17 pattern: "^channel(@[0-9a-f]+)?$"
31 diff-channels:
32 $ref: /schemas/types.yaml#/definitions/uint32-array
41 single-channel:
44 When devices combine single-ended and differential channels, allow the
45 channel for a single element to be specified, independent of reg (as for
[all …]
Dti,ads1119.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - João Paulo Gonçalves <jpaulo.silvagoncalves@gmail.com>
13 The TI ADS1119 is a precision 16-bit ADC over I2C that offers single-ended and
28 reset-gpios:
31 avdd-supply: true
32 dvdd-supply: true
34 vref-supply:
38 "#address-cells":
[all …]
Dadi,ad7173.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
16 can be used in high precision, low noise single channel applications
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
[all …]
Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
12 in single, continuous, scan or discontinuous mode. Result of the ADC is
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
[all …]
Dti,adc108s102.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Cameron <jic23@kernel.org>
13 Family of 8 channel, 10/12 bit, SPI, single ended ADCs.
21 vref-supply: true
22 "#io-channel-cells":
26 - compatible
27 - reg
28 - vref-supply
[all …]
Dti,ads8344.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gregory Clement <gregory.clement@bootlin.com>
13 16bit 8-channel ADC with single ended inputs.
22 vref-supply:
25 "#io-channel-cells":
29 - compatible
30 - reg
31 - vref-supply
[all …]
Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
[all …]
Dti,adc0832.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Akinobu Mita <akinobu.mita@gmail.com>
13 8 bit ADCs with 1, 2, 4 or 8 inputs for single ended or differential
19 - ti,adc0831
20 - ti,adc0832
21 - ti,adc0834
22 - ti,adc0838
27 vref-supply:
[all …]
Daspeed,ast2400-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joel Stanley <joel@jms.id.au>
13 This device is a 10-bit converter for 16 voltage channels. All inputs are
14 single ended.
19 - aspeed,ast2400-adc
20 - aspeed,ast2500-adc
34 "#io-channel-cells":
[all …]
/Documentation/devicetree/bindings/clock/
Dti,cdce706.txt1 Bindings for Texas Instruments CDCE706 programmable 3-PLL clock
7 - compatible: shall be "ti,cdce706".
8 - reg: i2c device address, shall be in range [0x68...0x6b].
9 - #clock-cells: from common clock binding; shall be set to 1.
10 - clocks: from common clock binding; list of parent clock
13 - clock-names: shall be clk_in0 and/or clk_in1. Use clk_in0
16 single-ended LVCMOS inputs configuration.
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <54000000>;
[all …]

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