Searched +full:soc +full:- +full:based (Results 1 – 25 of 225) sorted by relevance
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| /Documentation/devicetree/bindings/arm/ |
| D | realtek.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andreas Färber <afaerber@suse.de>
17 # RTD1195 SoC based boards
18 - items:
19 - enum:
20 - mele,x1000 # MeLE X1000
21 - realtek,horseradish # Realtek Horseradish EVB
22 - const: realtek,rtd1195
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| D | apple.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Hector Martin <marcan@marcan.st>
15 This currently includes devices based on the "M1" SoC:
17 - Mac mini (M1, 2020)
18 - MacBook Pro (13-inch, M1, 2020)
19 - MacBook Air (M1, 2020)
20 - iMac (24-inch, M1, 2021)
22 Devices based on the "M2" SoC:
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| D | calxeda.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
12 Bindings for boards with Calxeda Cortex-A9 based ECX-1000 (Highbank) SOC
13 or Cortex-A15 based ECX-2000 SOCs
20 - enum:
21 - calxeda,highbank
22 - calxeda,ecx-2000
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| /Documentation/devicetree/bindings/arm/ti/ |
| D | omap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments OMAP SoC architecture
10 - Tony Lindgren <tony@atomide.com>
12 description: Platforms based on Texas Instruments OMAP SoC architecture.
20 - description: TI OMAP2420 SoC based platforms
22 - enum:
23 - nokia,n800
24 - nokia,n810
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| D | k3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments K3 Multicore SoC architecture
10 - Nishanth Menon <nm@ti.com>
13 Platforms based on Texas Instruments K3 Multicore SoC architecture
22 - description: K3 AM62A7 SoC
24 - enum:
25 - ti,am62a7-sk
26 - const: ti,am62a7
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| /Documentation/devicetree/bindings/ptp/ |
| D | brcm,ptp-dte.txt | 1 * Broadcom Digital Timing Engine(DTE) based PTP clock
4 - compatible: should contain the core compatibility string
5 and the SoC compatibility string. The SoC
6 compatibility string is to handle SoC specific
9 "brcm,ptp-dte"
10 SoC compatibility strings:
11 "brcm,iproc-ptp-dte" - for iproc based SoC's
12 - reg: address and length of the DTE block's NCO registers
16 ptp: ptp-dte@180af650 {
17 compatible = "brcm,iproc-ptp-dte", "brcm,ptp-dte";
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| /Documentation/arch/arm/spear/ |
| D | overview.rst | 6 ------------
11 The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are
19 - SPEAr3XX (3XX SOC series, based on ARM9)
20 - SPEAr300 (SOC)
21 - SPEAr300 Evaluation Board
22 - SPEAr310 (SOC)
23 - SPEAr310 Evaluation Board
24 - SPEAr320 (SOC)
25 - SPEAr320 Evaluation Board
26 - SPEAr6XX (6XX SOC series, based on ARM9)
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| /Documentation/devicetree/bindings/arm/nuvoton/ |
| D | nuvoton,ma35d1.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton MA35 series SoC based platforms
10 - Jacky Huang <ychuang3@nuvoton.com>
13 Boards with an ARMv8 based Nuvoton MA35 series SoC shall have
22 - description: MA35D1 based boards
24 - enum:
25 - nuvoton,ma35d1-iot
26 - nuvoton,ma35d1-som
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| /Documentation/devicetree/bindings/rtc/ |
| D | isil,isl12057.txt | 8 ("wakeup-source") to handle the specific use-case found
9 on at least three in-tree users of the chip (NETGEAR ReadyNAS 102, 104
10 and 2120 ARM-based NAS); On those devices, the IRQ#2 pin of the chip
12 to the SoC but to a PMIC. It allows the device to be powered up when
15 be set when the IRQ#2 pin of the chip is not connected to the SoC but
20 - "compatible": must be "isil,isl12057"
21 - "reg": I2C bus address of the device
25 - "wakeup-source": mark the chip as a wakeup source, independently of
26 the availability of an IRQ line connected to the SoC.
37 Example isl12057 node with IRQ#2 pin connected to main SoC via MPP6 (note
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| /Documentation/devicetree/bindings/riscv/ |
| D | thead.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-HEAD SoC-based boards
10 - Jisheng Zhang <jszhang@kernel.org>
13 T-HEAD SoC-based boards
20 - description: BeagleV Ahead single board computer
22 - const: beagle,beaglev-ahead
23 - const: thead,th1520
24 - description: Sipeed Lichee Pi 4A board for the Sipeed Lichee Module 4A
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| D | sifive.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SiFive SoC-based boards
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
14 SiFive SoC-based boards
21 - items:
22 - enum:
23 - sifive,hifive-unleashed-a00
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| D | sophgo.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Sophgo SoC-based boards
10 - Chao Wei <chao.wei@sophgo.com>
11 - Chen Wang <unicorn_wang@outlook.com>
14 Sophgo SoC-based boards
21 - items:
22 - enum:
23 - milkv,duo
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| D | starfive.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: StarFive SoC-based boards
10 - Michael Zhu <michael.zhu@starfivetech.com>
11 - Drew Fustini <drew@beagleboard.org>
14 StarFive SoC-based boards
21 - items:
22 - enum:
23 - beagle,beaglev-starlight-jh7100-r0
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| D | microchip.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PolarFire SoC-based boards
10 - Conor Dooley <conor.dooley@microchip.com>
11 - Daire McNamara <daire.mcnamara@microchip.com>
14 Microchip PolarFire SoC-based boards
21 - items:
22 - enum:
23 - microchip,mpfs-icicle-reference-rtlv2203
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| D | canaan.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Canaan SoC-based boards
10 - Damien Le Moal <dlemoal@kernel.org>
13 Canaan Kendryte K210 SoC-based boards
20 - items:
21 - const: sipeed,maix-bit
22 - const: sipeed,maix-bitm
23 - const: canaan,kendryte-k210
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| /Documentation/arch/arm/keystone/ |
| D | overview.rst | 6 ------------
7 Keystone range of SoCs are based on ARM Cortex-A15 MPCore Processors
9 for users to run Linux on Keystone based EVMs from Texas Instruments.
11 Following SoCs & EVMs are currently supported:-
13 K2HK SoC and EVM
16 a.k.a Keystone 2 Hawking/Kepler SoC
23 http://www.advantech.com/Support/TI-EVM/EVMK2HX_sd.aspx
25 K2E SoC and EVM
28 a.k.a Keystone 2 Edison SoC
30 K2E - 66AK2E05:
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| /Documentation/ABI/testing/ |
| D | sysfs-devices-soc | 5 The /sys/devices/ directory contains a sub-directory for each
6 System-on-Chip (SoC) device on a running platform. Information
7 regarding each SoC can be obtained by reading sysfs files. This
10 The directory created for each SoC will also house information
12 It has been agreed that if an SoC device exists, its supported
13 devices would be better suited to appear as children of that SoC.
19 Read-only attribute common to all SoCs. Contains the SoC machine
26 Read-only attribute common to all SoCs. Contains SoC family name
29 On many of ARM based silicon with SMCCC v1.2+ compliant firmware
57 Read-only attribute supported by most SoCs. Contains the SoC's
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-7k-8k.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR X11)
3 ---
4 $id: http://devicetree.org/schemas/arm/marvell/armada-7k-8k.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
18 - description: Armada 7020 SoC
20 - const: marvell,armada7020
21 - const: marvell,armada-ap806-dual
22 - const: marvell,armada-ap806
24 - description: Armada 7040 SoC
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| /Documentation/devicetree/bindings/loongarch/ |
| D | loongson.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson SoC-based boards
10 - Binbin Zhou <zhoubinbin@loongson.cn>
17 - description: Loongson-2K0500 processor based boards
19 - const: loongson,ls2k0500-ref
20 - const: loongson,ls2k0500
22 - description: Loongson-2K1000 processor based boards
24 - const: loongson,ls2k1000-ref
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| /Documentation/devicetree/bindings/mips/ |
| D | ralink.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ralink SoC based Platforms
10 - Sergio Paracuellos <sergio.paracuellos@gmail.com>
13 Boards with a Ralink SoC shall have the following properties.
20 - description: Boards with Ralink RT2880 SoC
22 - enum:
23 - ralink,rt2880-eval-board
24 - const: ralink,rt2880-soc
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| D | realtek-rtl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mips/realtek-rtl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL83xx/93xx SoC series
10 - Bert Vermeulen <bert@biot.com>
11 - Sander Vanheule <sander@svanheule.net>
18 # RTL8382-based boards
19 - items:
20 - enum:
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | brcm,iproc-gpio.txt | 5 - compatible:
6 "brcm,iproc-gpio" for the generic iProc based GPIO controller IP that
7 supports full-featured pinctrl and GPIO functions used in various iProc
8 based SoCs
10 May contain an SoC-specific compatibility string to accommodate any
11 SoC-specific features
13 "brcm,cygnus-ccm-gpio", "brcm,cygnus-asiu-gpio", or
14 "brcm,cygnus-crmu-gpio" for Cygnus SoCs
16 "brcm,iproc-nsp-gpio" for the iProc NSP SoC that has drive strength support
19 "brcm,iproc-stingray-gpio" for the iProc Stingray SoC that has the general
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,nsp.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 applications. The SoC features dual core Cortex A9 ARM CPUs, integrating
14 DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash,
18 - Ray Jui <rjui@broadcom.com>
19 - Scott Branden <sbranden@broadcom.com>
26 - description: BCM58522 based boards
28 - enum:
29 - brcm,bcm958522er
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| /Documentation/devicetree/bindings/arm/cirrus/ |
| D | cirrus,ep9301.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The EP93xx SoC is a ARMv4T-based with 200 MHz ARM9 CPU.
13 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
14 - Nikita Shubin <nikita.shubin@maquefel.me>
21 - description: The TS-7250 is a compact, full-featured Single Board
22 Computer (SBC) based upon the Cirrus EP9302 ARM9 CPU
24 - const: technologic,ts7250
25 - const: cirrus,ep9301
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| /Documentation/devicetree/bindings/spi/ |
| D | brcm,bcm63xx-hsspi.yaml | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/spi/brcm,bcm63xx-hsspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom Broadband SoC High Speed SPI controller
10 - William Zhang <william.zhang@broadcom.com>
11 - Kursad Oney <kursad.oney@broadcom.com>
12 - Jonas Gorski <jonas.gorski@gmail.com>
15 Broadcom Broadband SoC supports High Speed SPI master controller since the
16 early MIPS based chips such as BCM6328 and BCM63268. This initial rev 1.0
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