Searched full:specify (Results 1 – 25 of 810) sorted by relevance
12345678910>>...33
| /Documentation/devicetree/bindings/mmc/ |
| D | nvidia,tegra20-sdhci.yaml | 69 description: specify GPIOs for power control 92 description: Specify the default inbound sampling clock trimmer value for 105 description: Specify the default outbound clock trimmer value. 109 description: Specify DQS trim value for HS400 timing. 113 description: Specify drive strength calibration offsets for 1.8 V 118 description: Specify drive strength used as a fallback in case the 123 description: Specify drive strength calibration offsets for 3.3 V 128 description: Specify drive strength used as a fallback in case the 133 description: Specify drive strength calibration offsets for SDR104 mode. 137 description: Specify drive strength calibration offsets for HS400 mode. [all …]
|
| D | fsl-imx-esdhc.yaml | 112 Specify the number of delay cells for override mode. 122 Specify the voltage range in case there are software transparent level 135 Specify the start delay cell point when send first CMD19 in tuning procedure. 141 Specify the increasing delay cell steps in tuning procedure. 151 Specify the strobe dll control slave delay target.
|
| /Documentation/ABI/testing/ |
| D | sysfs-class-led-trigger-pattern | 5 Specify a software pattern for the LED, that supports altering 18 Specify a software pattern for the LED, that supports altering 29 Specify a hardware pattern for the LED, for LED hardware that 43 Specify a pattern repeat number. -1 means repeat indefinitely,
|
| /Documentation/devicetree/bindings/gpio/ |
| D | gpio-xgene-sb.txt | 24 - second cell is used to specify the gpio polarity: 31 - second cell is used to specify flags. 33 - apm,nr-gpios: Optional, specify number of gpios pin. 34 - apm,nr-irqs: Optional, specify number of interrupt pins. 35 - apm,irq-start: Optional, specify lowest gpio pin support interrupt.
|
| D | 8xxx_gpio.txt | 8 See bindings/gpio/gpio.txt for details of how to specify GPIO 13 interrupt client nodes section) for details how to specify this GPIO 26 and the second cell is used to specify optional 35 cells required to specify an interrupt within
|
| D | microchip,pic32-gpio.txt | 9 the second cell is used to specify the gpio polarity as defined in 16 is used to specify the trigger type as defined in
|
| /Documentation/devicetree/bindings/net/nfc/ |
| D | ti,trf7970a.yaml | 20 Specify autosuspend delay in milliseconds. 24 Set to specify that the input frequency to the trf7970a is 13560000Hz or 30 Specify that the trf7970a being used has the "EN2 RF" erratum 38 Specify that the trf7970a being used has the "IRQ Status Read" erratum
|
| /Documentation/fb/ |
| D | sm501.rst | 11 Specify bits-per-pixel if not specified by 'mode' 14 Specify resolution as
|
| /Documentation/devicetree/bindings/input/ |
| D | input.yaml | 29 button/switch events. Specify KEY_RESERVED (0) to opt out of event 53 specify this property. 58 reset automatically. Device with key pressed reset feature can specify
|
| /Documentation/devicetree/bindings/usb/ |
| D | usb4604.txt | 9 - reset-gpios: Should specify GPIO for reset. 10 - initial-mode: Should specify initial mode.
|
| /Documentation/devicetree/bindings/sound/ |
| D | mt8195-afe-pcm.yaml | 88 description: Specify which input channel should be disabled. 93 description: Specify which input channel should be disabled. 97 description: Specify etdm in mclk output rate for always on case. 100 description: Specify etdm out mclk output rate for always on case. 113 etdm modules can share the same external clock pin. Specify 124 etdm modules can share the same external clock pin. Specify
|
| D | realtek,rt5659.yaml | 68 description: Specify which pin to be used as DMIC1 data pin. 79 description: Specify which pin to be used as DMIC2 data pin. 88 description: Specify which JD source be used.
|
| D | mt2701-cs42448.txt | 10 - pinctrl-0: Should specify pin control groups used for this controller. 11 - i2s1-in-sel-gpio1, i2s1-in-sel-gpio2: Should specify two gpio pins to
|
| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | pamu.txt | 59 Two cells that specify the geometry of the primary PAMU 62 specify a value of 1. 65 Two cells that specify the geometry of the secondary PAMU 68 specify a value of 1. 72 Devices that have LIODNs need to specify links to the parent PAMU controller 84 Two cells that specify the location of the LIODN register
|
| /Documentation/admin-guide/cgroup-v1/ |
| D | blkio-controller.rst | 14 specify upper IO rate limits on devices. This policy is implemented in 35 Specify a bandwidth rate on particular device for root group. The format 140 two fields specify the major and minor number of the device and 146 two fields specify the major and minor number of the device and 153 or async. First two fields specify the major and minor number of the 160 or async. First two fields specify the major and minor number of the 174 specify the major and minor number of the device, third field 189 read or write, sync or async. First two fields specify the major and 241 from service tree of the device. First two fields specify the major 286 or async. First two fields specify the major and minor number of the [all …]
|
| /Documentation/filesystems/ |
| D | ceph.rst | 100 You only need to specify a single monitor, as the client will get the 101 full list when it connects. (However, if the monitor you specify 136 Specify the IP and/or port the client should bind to locally. 142 Specify the maximum write size in bytes. Default: 64 MB. 145 Specify the maximum read size in bytes. Default: 64 MB. 148 Specify the maximum readahead size in bytes. Default: 8 MB. 151 Specify the timeout value for mount (in seconds), in the case 156 Specify the maximum number of caps to hold. Unused caps are released
|
| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-tipwmss.txt | 10 - address-cells: Specify the number of u32 entries needed in child nodes. 12 - size-cells: specify number of u32 entries needed to specify child nodes size
|
| /Documentation/devicetree/bindings/iio/dac/ |
| D | dac.yaml | 31 Specify the channel output full scale range in microamperes. 37 Specify the channel output full scale range in microvolts.
|
| /Documentation/kbuild/ |
| D | kbuild.rst | 151 Specify the output directory when building the kernel. 155 directory. Please note that this does NOT specify the output directory for the 164 Specify the extra build checks. The same value can be assigned by passing 181 Specify extra (warning/error) flags for kernel-doc checks during the build, 200 Specify an optional fixed part of the binutils filename. 234 specify a custom installer when cross compiling a kernel. 238 Specify where to install modules. 310 For tags/TAGS/cscope targets, you can specify more than one arch 315 To get all available archs you can also specify all. E.g.::
|
| /Documentation/devicetree/bindings/clock/ |
| D | imx93-clock.yaml | 27 specify the external clocks used by the CCM module. 35 specify the external clocks names used by the CCM module.
|
| /Documentation/devicetree/bindings/phy/ |
| D | hisilicon,hi3798cv200-combphy.yaml | 31 setting, the property should be present to specify the particular mode. 37 present to specify the register bits in peripheral controller.
|
| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | brcm,iproc-touchscreen.txt | 12 - address-cells: Specify the number of u32 entries needed in child nodes. 14 - size-cells: Specify number of u32 entries needed to specify child nodes size
|
| /Documentation/devicetree/bindings/net/ |
| D | qca,qca7000.txt | 14 - reg : Should specify the SPI chip select 15 - interrupts : The first cell should specify the index of the source 16 interrupt and the second cell should specify the trigger
|
| /Documentation/userspace-api/ |
| D | futex2.rst | 37 and ``flags`` to specify the type (e.g. private) and size of futex. 67 absolute timeout. You need to specify the type of clock being used at 77 private futexes, it's necessary to specify ``FUTEX_PRIVATE_FLAG`` in the futex
|
| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | qcom,mpm.yaml | 42 Specify the IRQ used by RPM to wakeup APSS. 47 Specify the mailbox used to notify RPM for writing vMPM registers. 59 Specify the total MPM pin count that a SoC supports.
|
12345678910>>...33