Searched full:synopsys (Results 1 – 25 of 114) sorted by relevance
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| /Documentation/devicetree/bindings/mmc/ |
| D | bluefield-dw-mshc.txt | 1 * Mellanox Bluefield SoC specific extensions to the Synopsys Designware
4 Read synopsys-dw-mshc.txt for more details
6 The Synopsys designware mobile storage host controller is used to interface
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Mellanox Bluefield SoC
10 specific extensions to the Synopsys Designware Mobile Storage Host Controller.
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| D | k3-dw-mshc.txt | 1 * Hisilicon specific extensions to the Synopsys Designware Mobile
4 Read synopsys-dw-mshc.txt for more details
6 The Synopsys designware mobile storage host controller is used to interface
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
10 extensions to the Synopsys Designware Mobile Storage Host Controller.
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| D | rockchip-dw-mshc.yaml | 10 Rockchip uses the Synopsys designware mobile storage host controller
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
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| D | synopsys-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc.yaml#
7 title: Synopsys Designware Mobile Storage Host Controller
56 - $ref: synopsys-dw-mshc-common.yaml#
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| D | starfive,jh7110-mmc.yaml | 10 StarFive uses the Synopsys designware mobile storage host controller
14 - $ref: synopsys-dw-mshc-common.yaml#
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| D | synopsys-dw-mshc-common.yaml | 4 $id: http://devicetree.org/schemas/mmc/synopsys-dw-mshc-common.yaml#
7 title: Synopsys Designware Mobile Storage Host Controller Common Properties
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| /Documentation/devicetree/bindings/net/pcs/ |
| D | snps,dw-xpcs.yaml | 7 title: Synopsys DesignWare Ethernet PCS
13 Synopsys DesignWare Ethernet Physical Coding Sublayer provides an interface
18 Synopsys PMA (also called DesignWare Consumer/Enterprise PHY) although in
28 - description: Synopsys DesignWare XPCS with none or unknown PMA
30 - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA
32 - description: Synopsys DesignWare XPCS with Consumer Gen2 3G PMA
34 - description: Synopsys DesignWare XPCS with Consumer Gen2 6G PMA
36 - description: Synopsys DesignWare XPCS with Consumer Gen4 3G PMA
38 - description: Synopsys DesignWare XPCS with Consumer Gen4 6G PMA
40 - description: Synopsys DesignWare XPCS with Consumer Gen5 10G PMA
[all …]
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| /Documentation/arch/arc/ |
| D | arc.rst | 16 - `<https://github.com/foss-for-synopsys-dwc-arc-processors>`_ -
20 Other projects are developed by Synopsys and made available to community
23 - `Official Synopsys ARC Processors website
24 <https://www.synopsys.com/designware-ip/processor-solutions.html>`_ -
27 <https://www.synopsys.com/dw/doc.php/ds/cc/programmers-reference-manual-ARC-HS.pdf>`_)
29 <https://www.synopsys.com/cgi-bin/dwarcnsim/req1.cgi>`_ and
30 `MetaWare Light Edition <https://www.synopsys.com/cgi-bin/arcmwtk_lite/reg1.cgi>`_).
65 Synopsys offers prebuilt toolchain releases which can be used for this purpose,
68 - Synopsys GNU toolchain releases:
69 `<https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases>`_
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| /Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-dw-hdmi.yaml | 8 title: Amlogic specific extensions to the Synopsys Designware HDMI Controller
17 The Amlogic Meson Synopsys Designware Integration is composed of
18 - A Synopsys DesignWare HDMI Controller IP
25 | Synopsys HDMI | HDMI PHY |=> TMDS
30 The Synopsys HDMI Controller interrupt is routed through the
32 Communication to the TOP Block and the Synopsys HDMI Controller is done
43 Amlogic Meson GXBB, GXL and GXM SoCs families embeds the Synopsys DesignWare
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| D | amlogic,meson-g12a-dw-mipi-dsi.yaml | 8 title: Amlogic specific extensions to the Synopsys Designware MIPI DSI Host Controller
14 The Amlogic Meson Synopsys Designware Integration is composed of
15 - A Synopsys DesignWare MIPI DSI Host Controller IP
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| /Documentation/gpu/bridge/ |
| D | dw-hdmi.rst | 2 drm/bridge/dw-hdmi Synopsys DesignWare HDMI Controller
5 Synopsys DesignWare HDMI Controller
8 This section covers everything related to the Synopsys DesignWare HDMI
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| /Documentation/misc-devices/ |
| D | dw-xdata-pcie.rst | 4 Driver for Synopsys DesignWare PCIe traffic generator (also known as xData)
8 Synopsys DesignWare PCIe prototype solution
14 Gustavo Pimentel <gustavo.pimentel@synopsys.com>
19 This driver should be used as a host-side (Root Complex) driver and Synopsys
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | synopsys,dw-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
13 This document defines device tree properties for the Synopsys DesignWare HDMI
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| D | fsl,imx93-mipi-dsi.yaml | 7 title: Freescale i.MX93 specific extensions to Synopsys Designware MIPI DSI
13 There is a Synopsys Designware MIPI DSI Host Controller and a Synopsys
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| D | snps,dw-mipi-dsi.yaml | 7 title: Synopsys DesignWare MIPI DSI host controller
13 This document defines device tree properties for the Synopsys DesignWare MIPI
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| D | ingenic,jz4780-hdmi.yaml | 13 The HDMI Transmitter in the Ingenic JZ4780 is a Synopsys DesignWare HDMI 1.4
17 - $ref: synopsys,dw-hdmi.yaml#
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| /Documentation/devicetree/bindings/ata/ |
| D | snps,dwc-ahci.yaml | 7 title: Synopsys DWC AHCI SATA controller
13 This document defines device tree bindings for the generic Synopsys DWC
31 - description: Synopsys AHCI SATA-compatible devices
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | snps,dw-umctl2-ddrc.yaml | 7 title: Synopsys DesignWare Universal Multi-Protocol Memory Controller
14 Synopsys DesignWare Enhanced uMCTL2 DDR Memory Controller is capable of
27 description: Synopsys DW uMCTL2 DDR controller v3.80a
29 - description: Synopsys DW uMCTL2 DDR controller
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | snps,dw-apb-ictl.txt | 1 Synopsys DesignWare APB interrupt controller (dw_apb_ictl)
3 Synopsys DesignWare provides interrupt controller IP for APB known as
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| /Documentation/devicetree/bindings/media/ |
| D | microchip,csi2dc.yaml | 21 IDI interface is Synopsys proprietary.
29 CSI2DC supports a single 'port' node as a sink port with either Synopsys
143 # and the input is received from Synopsys IDI interface
172 # and the input is received from Synopsys IDI interface
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| /Documentation/ABI/testing/ |
| D | sysfs-driver-xdata | 4 Contact: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
29 Contact: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
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| /Documentation/devicetree/bindings/phy/ |
| D | qcom,usb-ss.yaml | 7 title: Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
13 Qualcomm Synopsys 1.0.0 SuperSpeed USB PHY
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| /Documentation/devicetree/bindings/dma/ |
| D | snps,dw-axi-dmac.yaml | 7 title: Synopsys DesignWare AXI DMA Controller
10 - Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
13 Synopsys DesignWare AXI DMA Controller DT Binding
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| /Documentation/devicetree/bindings/pci/ |
| D | axis,artpec6-pcie.txt | 3 This PCIe host controller is based on the Synopsys DesignWare PCIe IP
22 used to enable and control the Synopsys IP.
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| /Documentation/devicetree/bindings/timer/ |
| D | snps,archs-gfrc.txt | 1 Synopsys ARC Free Running 64-bit Global Timer for ARC HS CPUs
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