Searched +full:t +full:- +full:head (Results 1 – 25 of 97) sorted by relevance
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| /Documentation/dev-tools/ |
| D | checkuapi.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
7 The UAPI checker (``scripts/check-uapi.sh``) is a shell script which
8 checks UAPI header files for userspace backwards-compatibility across
14 This section will describe the options with which ``check-uapi.sh``
19 check-uapi.sh [-b BASE_REF] [-p PAST_REF] [-j N] [-l ERROR_LOG] [-i] [-q] [-v]
23 -b BASE_REF Base git reference to use for comparison. If unspecified or empty,
25 dirty changes, HEAD will be used.
26 -p PAST_REF Compare BASE_REF to PAST_REF (e.g. -p v6.1). If unspecified or empty,
29 -j JOBS Number of checks to run in parallel (default: number of CPU cores).
30 -l ERROR_LOG Write error log to file (default: no error log is generated).
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| /Documentation/mm/ |
| D | transhuge.rst | 12 - "graceful fallback": mm components which don't have transparent hugepage
17 - if a hugepage allocation fails because of memory fragmentation,
22 - if some task quits and more hugepages become available (either
27 - it doesn't require memory reservation and in turn it uses hugepages
38 head or tail pages as usual (exactly as they would do on
41 is complete, so they won't ever notice the fact the page is huge. But
43 page (like for checking page->mapping or other bits that are relevant
44 for the head page and not the tail page), it should be updated to jump
45 to check head page instead. Taking a reference on any head/tail page would
49 these aren't new constraints to the GUP API, and they match the
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| /Documentation/core-api/ |
| D | circular-buffers.rst | 12 (1) Convenience functions for determining information about power-of-2 sized
16 buffer don't want to share a lock.
27 (*) Measuring power-of-2 buffers.
30 - The producer.
31 - The consumer.
41 (1) A 'head' index - the point at which the producer inserts items into the
44 (2) A 'tail' index - the point at which the consumer finds the next item in
47 Typically when the tail pointer is equal to the head pointer, the buffer is
48 empty; and the buffer is full when the head pointer is one less than the tail
51 The head index is incremented when items are added, and the tail index when
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| D | folio_queue.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
38 doubly-linked list, it is intentionally not a circular list; the outward
45 * three 1-bit marks per folio,
86 to check that the capacity wasn't overrun and the list will not be extended
94 but doesn't change the folio count - so future accesses of that slot must check
133 assumed that this won't vary between segments. The second returns the number
139 initialised, and it assumed that slots won't get reused, but rather the segment
191 If properly managed, the list can be extended by the producer at the head end
206 head and tail pointers from collapsing.
212 .. kernel-doc:: include/linux/folio_queue.h
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| D | pin_user_pages.rst | 1 .. SPDX-License-Identifier: GPL-2.0
35 In other words, use pin_user_pages*() for DMA-pinned pages, and
54 flags the caller provides. The caller is required to pass in a non-null struct
65 head page. And in fact, testing revealed that, without a separate pincount
72 --------
79 but the caller passed in a non-null struct pages* array, then the function
84 --------
89 Tracking dma-pinned pages
92 Some of the key design constraints, and solutions, for tracking dma-pinned
98 * False positives (reporting that a page is dma-pinned, when in fact it is not)
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| /Documentation/devicetree/bindings/riscv/ |
| D | thead.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-HEAD SoC-based boards
10 - Jisheng Zhang <jszhang@kernel.org>
13 T-HEAD SoC-based boards
20 - description: BeagleV Ahead single board computer
22 - const: beagle,beaglev-ahead
23 - const: thead,th1520
24 - description: Sipeed Lichee Pi 4A board for the Sipeed Lichee Module 4A
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| /Documentation/locking/ |
| D | robust-futex-ABI.rst | 40 sys_set_robust_list(struct robust_list_head __user *head, size_t len);
42 The pointer 'head' points to a structure in the threads address space
45 its own thread private 'head'.
48 kernel, then it can actually have two such structures - one using 32 bit
55 The first word in the memory structure at 'head' contains a
58 to itself, 'head'. The last 'lock entry' points back to the 'head'.
73 Each 'lock entry' on the single linked list starting at 'head' consists
75 'head' if there are no more entries. In addition, nearby to each 'lock
94 anticipates using robust_futexes, the kernel stores the passed in 'head'
104 robust_futex mechanism doesn't care what else is in that structure, so
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| D | ww-mutex-design.rst | 2 Wound/Wait Deadlock-Proof Mutex Design
5 Please read mutex-design.rst first, as it applies to wait/wound mutexes too.
7 Motivation for WW-Mutexes
8 -------------------------
23 may in turn require evicting some other buffers (and you don't want to
37 and the deadlock handling approach is called Wait-Die. The name is based on
41 and dies. Hence Wait-Die.
42 There is also another algorithm called Wound-Wait:
46 transaction. Hence Wound-Wait.
48 However, the Wound-Wait algorithm is typically stated to generate fewer backoffs
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| /Documentation/devicetree/bindings/clock/ |
| D | thead,th1520-clk-ap.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/thead,th1520-clk-ap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-HEAD TH1520 AP sub-system clock controller
10 The T-HEAD TH1520 AP sub-system clock controller configures the
14 …https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manua…
17 - Jisheng Zhang <jszhang@kernel.org>
18 - Wei Fu <wefu@redhat.com>
19 - Drew Fustini <dfustini@tenstorrent.com>
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| /Documentation/admin-guide/laptops/ |
| D | disk-shock-protection.rst | 7 Last modified: 2008-10-03
19 --------
21 ATA/ATAPI-7 specifies the IDLE IMMEDIATE command with unload feature.
29 implement a generic disk head parking interface in the Linux kernel.
37 ----------------
42 -EOPNOTSUPP if the device does not support the unload feature.
46 no further disk head park request has been issued in the meantime,
49 -EOVERFLOW, but heads will be parked anyway and the timeout will be
51 value between 0 and 30000 by issuing a subsequent head park request
55 immediately by specifying a timeout of 0. Values below -2 are rejected
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| /Documentation/process/ |
| D | backporting.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 merging branches, or resolving conflicts in their day-to-day work, so
24 This document aims to be a comprehensive, step-by-step guide to
31 in which case you just cherry-pick it directly using
32 ``git cherry-pick``. However, if the patch comes from an email, as it
42 where the patch applies cleanly and *then* cherry-pick it over to your
47 can apply it to the most recent mainline kernel and then cherry-pick it
51 was generated from, but it doesn't really matter that much as long as it
52 applies cleanly and isn't too far from the original base. The only
54 in more unrelated changes in the context of the diff when cherry-picking
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| /Documentation/networking/device_drivers/ethernet/toshiba/ |
| D | spider_net.rst | 1 .. SPDX-License-Identifier: GPL-2.0
29 "full" and "not-in-use". An "empty" or "ready" descriptor is ready
31 and is waiting to be emptied and processed by the OS. A "not-in-use"
40 buffers, processing them, and re-marking them empty.
42 This filling and emptying is managed by three pointers, the "head"
54 descr. The OS will process this descr, and then mark it "not-in-use",
57 all of those behind it should be "not-in-use". When RX traffic is not
62 The head pointer (somewhat mis-named) follows after the tail pointer.
63 When traffic is flowing, then the head pointer will be pointing at
64 a "not-in-use" descr. The OS will perform various housekeeping duties
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| /Documentation/devicetree/bindings/display/tegra/ |
| D | nvidia,tegra20-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^dc@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-dc
21 - nvidia,tegra30-dc
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| /Documentation/filesystems/xfs/ |
| D | xfs-delayed-logging-design.rst | 1 .. SPDX-License-Identifier: GPL-2.0
33 details logged are made up of the changes to in-core structures rather than
34 on-disk structures. Other objects - typically buffers - have their physical
46 The method used to log an item or chain modifications together isn't
64 place. This means that permanent transactions can be used for one-shot
65 modifications, but one-shot reservations cannot be used for permanent
68 In the code, a one-shot transaction pattern looks somewhat like this::
97 While this might look similar to a one-shot transaction, there is an important
123 the on-disk journal.
155 because it can't be written to the journal due to a lack of space in the
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| /Documentation/RCU/ |
| D | rculist_nulls.rst | 1 .. SPDX-License-Identifier: GPL-2.0
8 protect read-mostly linked lists and
33 -------------------
50 if (obj->key != key) { // not the object we expected
66 for (pos = rcu_dereference((head)->first);
67 pos && ({ next = pos->next; smp_rmb(); prefetch(next); 1; }) &&
70 if (obj->key == key)
78 for (pos = rcu_dereference((head)->first);
79 pos && ({ prefetch(pos->next); 1; }) &&
81 pos = rcu_dereference(pos->next))
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| /Documentation/doc-guide/ |
| D | sphinx.rst | 12 .. _Sphinx: http://www.sphinx-doc.org/
16 documentation comments, or kernel-doc comments, from source files. Usually these
18 kernel-doc comments have some special structure and formatting, but beyond that
34 :ref:`sphinx-pre-install` for further details.
42 Sphinx inside a virtual environment, using ``virtualenv-3``
56 (sphinx_latest) $ pip install -r Documentation/sphinx/requirements.txt
64 ------------
71 still build the documentation, but won't include any images at the
75 --------------------
86 ------------------------
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| /Documentation/devicetree/bindings/interrupt-controller/ |
| D | sifive,plic-1.0.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive Platform-Level Interrupt Controller (PLIC)
11 SiFive SoCs and other RISC-V SoCs include an implementation of the
12 Platform-Level Interrupt Controller (PLIC) high-level specification in
13 the RISC-V Privileged Architecture specification. The PLIC connects all
18 in an 4 core system with 2-way SMT, you have 8 harts and probably at least two
21 Each interrupt can be enabled on per-context basis. Any context can claim
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| /Documentation/admin-guide/perf/ |
| D | alibaba_pmu.rst | 2 Alibaba's T-Head SoC Uncore Performance Monitoring Unit (PMU)
5 The Yitian 710, custom-built by Alibaba Group's chip development business,
6 T-Head, implements uncore PMU for performance and functional debugging to
9 DDR Sub-System Driveway (DRW) PMU Driver
14 channel is split into two independent sub-channels. The DDR Sub-System Driveway
15 implements separate PMUs for each sub-channel to monitor various performance
20 sub-channels of the same channel in die 0. And the PMU device of die 1 is
23 Each sub-channel has 36 PMU counters in total, which is classified into
26 - Group 0: PMU Cycle Counter. This group has one pair of counters
30 - Group 1: PMU Bandwidth Counters. This group has 8 counters that are used
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| /Documentation/fb/ |
| D | matroxfb.rst | 16 * Most important: boot logo :-)
34 box) and matroxfb (for graphics mode). You should not compile-in vesafb
35 unless you have primary display on non-Matrox VBE2.0 device (see
43 -------------
58 -------------------------
73 ----------
86 Non-listed number can be achieved by more complicated command-line, for
93 XF{68,86}_FBDev should work just fine, but it is non-accelerated. On non-intel
97 Running another (accelerated) X-Server like XF86_SVGA works too. But (at least)
99 head, not even talking about second). Running XFree86 4.x accelerated mga
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| /Documentation/arch/powerpc/ |
| D | cpu_features.rst | 8 This document describes the system (including self-modifying code) used in the
10 compile-time selection.
23 C code may test 'cur_cpu_spec[smp_processor_id()]->cpu_features' for a
28 several paths that are performance-critical and would suffer if an array
30 performance penalty but still allow for runtime (rather than compile-time) CPU
32 based on CPU 0's capabilities, so a multi-processor system with non-identical
37 that shouldn't be used by writing nop's over it. Using cpufeatures requires
38 just 2 macros (found in arch/powerpc/include/asm/cputable.h), as seen in head.S
48 If CPU 0 supports Altivec, the code is left untouched. If it doesn't, both
53 cur_cpu_spec[0]->cpu_features) or is cleared, respectively. These two macros
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| /Documentation/userspace-api/ |
| D | perf_ring_buffer.rst | 1 .. SPDX-License-Identifier: GPL-2.0
15 2.2.2 Per-thread mode
16 2.2.3 Per-CPU mode
19 2.3.1 Producer-consumer model
55 -------------------
57 That said, a typical ring buffer is managed by a head pointer and a tail
58 pointer; the head pointer is manipulated by a writer and the tail
63 +---------------------------+
65 +---------------------------+
66 `-> Tail `-> Head
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| /Documentation/arch/arm/ |
| D | arm.rst | 9 ---------------------
13 a good compiler. Fortunately, you needn't guess. The kernel will report
16 To build ARM Linux natively, you shouldn't have to alter the ARCH = line
17 in the top level Makefile. However, if you don't have the ARM Linux ELF
21 If you wish to cross-compile, then alter the following lines in the top
36 CROSS_COMPILE=<your-path-to-your-compiler-without-gcc>
40 CROSS_COMPILE=arm-linux-
48 ---------------
54 Bug reports should be sent to linux-arm-kernel@lists.arm.linux.org.uk,
64 -------------
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| /Documentation/networking/ |
| D | tproxy.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 This feature adds Linux 2.2-like transparent proxy support to current kernels.
13 1. Making non-local sockets work
19 # iptables -t mangle -N DIVERT
20 # iptables -t mangle -A PREROUTING -p tcp -m socket --transparent -j DIVERT
21 # iptables -t mangle -A DIVERT -j MARK --set-mark 1
22 # iptables -t mangle -A DIVERT -j ACCEPT
27 # nft add chain filter divert "{ type filter hook prerouting priority -150; }"
37 modify your application to allow it to send datagrams _from_ non-local IP
42 /* - 8< -*/
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| /Documentation/input/devices/ |
| D | elantech.rst | 4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
25 5.2.1 Parity checking and packet re-synchronization
37 7.2.2 Head packet
57 combine a status packet with multiple head or motion packets. Hardware version
114 non-zero value will turn it ON. For hardware version 1 the default is ON.
145 4 bytes version: (after the arrow is the name given in the Dell-provided driver)
173 ---------
179 echo -n 0x16 > reg_10
184 B C T D L A S E
191 T: 1 = disable tapping
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| /Documentation/infiniband/ |
| D | tag_matching.rst | 5 The MPI standard defines a set of rules, known as tag-matching, for matching
10 * User tag - wild card may be specified by the receiver
15 message envelopes may match, the pair that includes the earliest posted-send
16 and the earliest posted-receive is the pair that must be used to satisfy the
17 matching operation. However, this doesn’t imply that tags are consumed in
19 earlier tags can’t be used to satisfy the matching rules.
31 1. The Eager protocol- the complete message is sent when the send is
35 2. The Rendezvous Protocol - the sender sends the tag-matching header,
47 using the MPI send routines. The head of the posted receive list may be
51 pre-posted receive for this arriving message, it is passed to the software and
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