| /Documentation/devicetree/bindings/sound/ |
| D | qcom,lpass-tx-macro.yaml | 4 $id: http://devicetree.org/schemas/sound/qcom,lpass-tx-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) TX Macro audio codec
16 - qcom,sc7280-lpass-tx-macro
17 - qcom,sm6115-lpass-tx-macro
18 - qcom,sm8250-lpass-tx-macro
19 - qcom,sm8450-lpass-tx-macro
20 - qcom,sm8550-lpass-tx-macro
21 - qcom,sc8280xp-lpass-tx-macro
24 - qcom,sm8650-lpass-tx-macro
25 - qcom,x1e80100-lpass-tx-macro
[all …]
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| D | rockchip,i2s-tdm.yaml | 46 - tx
51 - description: clock for TX
79 description: resets for the tx and rx directions
86 - tx-m
101 rockchip,trcm-sync-tx-only:
103 description: Use TX BCLK/LRCK for both TX and RX.
107 description: Use RX BCLK/LRCK for both TX and RX.
122 rockchip,i2s-tx-route:
125 Defines the mapping of I2S TX sdos to I2S data bus lines.
127 rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
[all …]
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| D | qcom,wcd937x-sdw.yaml | 14 It has RX and TX Soundwire slave devices. This bindings is for the
24 qcom,tx-port-mapping:
26 Specifies static port mapping between device and host tx ports.
29 Supports maximum 4 tx soundwire ports.
31 WCD9370 TX Port 1 (ADC1) <=> SWR2 Port 2
32 WCD9370 TX Port 2 (ADC2, 3) <=> SWR2 Port 2
33 WCD9370 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3
34 WCD9370 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4
87 qcom,tx-port-mapping = <2 2 3 4>;
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| D | davinci-mcasp-audio.yaml | 52 0 - Inactive, 1 - TX, 2 - RX
70 - const: tx
79 tx-num-evt:
96 specify the drive on TX pin during inactive time slots
110 - description: TX interrupt
111 const: tx
114 - description: TX and RX interrupts
116 - const: tx
190 interrupt-names = "tx", "rx";
194 dma-names = "tx", "rx";
[all …]
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| D | davinci-mcbsp.yaml | 39 - const: tx
45 - description: TX interrupt
50 - const: tx
70 ti,T1-framing-tx:
73 If the property is present, tx data delay is set to 2 bit clock periods.
107 interrupt-names = "rx", "tx";
110 dma-names = "tx", "rx";
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| /Documentation/networking/net_cachelines/ |
| D | tcp_sock.rst | 11 …d_mostly read_mostly tcp_bound_to_half_wnd,tcp_current_mss(tx);tcp_rcv_established…
13 …ags read_write read_mostly tcp_select_window(tx);tcp_rcv_established…
17 …cleanup_rbuf,tcp_send_ack,tcp_inq_hint,tcp_transmit_skb,tcp_receive_window(tx);tcp_v6_do_rcv,tcp_r…
20 …p_rate_check_app_limited,__tcp_transmit_skb,tcp_event_new_data_sent(write)(tx);tcp_rcv_established…
26 …ite tcp_wnd_end,tcp_urg_mode,tcp_minshall_check,tcp_cwnd_validate(tx);tcp_ack,tcp_may_upd…
32 … read_mostly read_mostly tcp_established_options(tx);tcp_fast_parse_opti…
36 … read_mostly read_mostly tcp_wnd_end,tcp_tso_should_defer(tx);tcp_fast_path_on(rx)
38 …imited,tcp_current_mss,tcp_sync_mss,tcp_sndbuf_expand,tcp_tso_should_defer(tx);tcp_update_pacing_r…
73 …ead_write tcp_mstamp_refresh(tcp_write_xmit/tcp_rcv_space_adjust)(tx);tcp_rcv_space_adjus…
74 … read_mostly read_write tcp_tso_should_defer(tx);tcp_update_pacing_r…
[all …]
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| D | net_device.rst | 10 … priv_flags read_mostly - __dev_queue_xmit(tx)
11 … read_mostly - HARD_TX_LOCK,HARD_TX_TRYLOCK,HARD_TX_UNLOCK(tx)
23 … ptype_all read_mostly - dev_nit_active(tx)
26 …_mostly __dev_queue_xmit,__dev_xmit_skb,ip6_output,__ip6_finish_output(tx);ip6_rcv_core(rx)
28 …_ops read_mostly - netdev_core_pick_tx,netdev_start_xmit(tx)
32 … hard_header_len read_mostly read_mostly ip6_xmit(tx);gro_list_prepare(rx)
36 …y read_mostly HARD_TX_LOCK,netif_skb_features,sk_setup_caps(tx);netif_elide_gro(rx)
60 …r_ops read_mostly - ip_finish_output2,ip6_finish_output2(tx)
113 … _tx read_mostly - netdev_get_tx_queue(tx)
115 …real_num_tx_queues read_mostly - skb_tx_hash,netdev_core_pick_tx(tx)
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| /Documentation/devicetree/bindings/phy/ |
| D | amlogic,meson8-hdmi-tx-phy.yaml | 4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#
7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
13 The HDMI TX PHY node should be the child of a syscon node with the
29 - amlogic,meson8b-hdmi-tx-phy
30 - amlogic,meson8m2-hdmi-tx-phy
31 - const: amlogic,meson8-hdmi-tx-phy
32 - const: amlogic,meson8-hdmi-tx-phy
54 compatible = "amlogic,meson8-hdmi-tx-phy";
61 compatible = "amlogic,meson8b-hdmi-tx-phy", "amlogic,meson8-hdmi-tx-phy";
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| D | mediatek,dsi-phy.yaml | 25 - mediatek,mt7623-mipi-tx
26 - const: mediatek,mt2701-mipi-tx
29 - mediatek,mt6795-mipi-tx
30 - const: mediatek,mt8173-mipi-tx
33 - mediatek,mt8188-mipi-tx
34 - mediatek,mt8195-mipi-tx
35 - mediatek,mt8365-mipi-tx
36 - const: mediatek,mt8183-mipi-tx
37 - const: mediatek,mt2701-mipi-tx
38 - const: mediatek,mt8173-mipi-tx
[all …]
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| D | transmit-amplitude.yaml | 17 tx-p2p-microvolt:
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
26 Names of the modes corresponding to voltages in the 'tx-p2p-microvolt'
93 tx-p2p-microvolt-names: [ tx-p2p-microvolt ]
101 tx-p2p-microvolt = <915000>, <1100000>, <1200000>;
102 tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss";
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| D | fsl,imx8mq-usb-phy.yaml | 38 fsl,phy-tx-vref-tune-percent:
44 fsl,phy-tx-rise-tune-percent:
51 fsl,phy-tx-preemp-amp-tune-microamp:
58 fsl,phy-tx-vboost-level-microvolt:
70 fsl,phy-pcs-tx-deemph-3p5db-attenuation-db:
72 Adjust TX de-emphasis attenuation in dB at nominal
78 fsl,phy-pcs-tx-swing-full-percent:
80 Scaling of the voltage defined by fsl,phy-tx-vboost-level-microvolt
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| D | apm-xgene-phy.txt | 17 - apm,tx-eye-tuning : Manual control to fine tune the capture of the serial
22 - apm,tx-eye-direction : Eye tuning manual control direction. 0 means sample
27 - apm,tx-boost-gain : Frequency boost AC (LSB 3-bit) and DC (2-bit)
31 - apm,tx-amplitude : Amplitude control. Two set of 3-tuple setting for
35 - apm,tx-pre-cursor1 : 1st pre-cursor emphasis taps control. Two set of
39 - apm,tx-pre-cursor2 : 2nd pre-cursor emphasis taps control. Two set of
43 - apm,tx-post-cursor : Post-cursor emphasis taps control. Two set of
46 - apm,tx-speed : Tx operating speed. One set of 3-tuple for each
|
| /Documentation/networking/ |
| D | multi-pf-netdev.rst | 52 the leader PF (east <-> west traffic) to function. All Rx/Tx traffic is steered through the primary
98 {'id': 0, 'ifindex': 13, 'napi-id': 539, 'type': 'tx'},
99 {'id': 1, 'ifindex': 13, 'napi-id': 540, 'type': 'tx'},
100 {'id': 2, 'ifindex': 13, 'napi-id': 541, 'type': 'tx'},
101 {'id': 3, 'ifindex': 13, 'napi-id': 542, 'type': 'tx'},
102 {'id': 4, 'ifindex': 13, 'napi-id': 543, 'type': 'tx'}]
128 In Tx, the primary PF creates a new Tx flow table, which is aliased by the secondaries, so they can
142 - /sys/class/net/eth2/queues/tx-0/xps_cpus:000001
143 - /sys/class/net/eth2/queues/tx-1/xps_cpus:001000
144 - /sys/class/net/eth2/queues/tx-2/xps_cpus:000002
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| /Documentation/userspace-api/media/cec/ |
| D | cec-pin-error-inj.rst | 37 # clear clear all rx and tx error injections
39 # tx-clear clear all tx error injections
40 # <op> clear clear all rx and tx error injections for <op>
42 # <op> tx-clear clear all tx error injections for <op>
51 # TX error injection settings:
52 # tx-ignore-nack-until-eom ignore early NACKs until EOM
53 # tx-custom-low-usecs <usecs> define the 'low' time for the custom pulse
54 # tx-custom-high-usecs <usecs> define the 'high' time for the custom pulse
55 # tx-custom-pulse transmit the custom pulse once the bus is idle
57 # TX error injection:
[all …]
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| /Documentation/devicetree/bindings/display/msm/ |
| D | hdmi.yaml | 16 - qcom,hdmi-tx-8084
17 - qcom,hdmi-tx-8660
18 - qcom,hdmi-tx-8960
19 - qcom,hdmi-tx-8974
20 - qcom,hdmi-tx-8994
21 - qcom,hdmi-tx-8996
22 - qcom,hdmi-tx-8998
69 qcom,hdmi-tx-mux-en-gpios:
74 qcom,hdmi-tx-mux-sel-gpios:
79 qcom,hdmi-tx-mux-lpm-gpios:
[all …]
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| /Documentation/ABI/testing/ |
| D | sysfs-class-net-queues | 19 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_timeout
27 What: /sys/class/net/<iface>/queues/tx-<queue>/tx_maxrate
35 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_cpus
45 What: /sys/class/net/<iface>/queues/tx-<queue>/xps_rxqs
56 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/hold_time
65 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/inflight
73 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit
82 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_max
91 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/limit_min
100 What: /sys/class/net/<iface>/queues/tx-<queue>/byte_queue_limits/stall_thrs
[all …]
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| /Documentation/devicetree/bindings/net/ |
| D | lantiq,etop-xway.yaml | 24 - description: TX interrupt
29 - const: tx
32 lantiq,tx-burst-length:
35 TX programmable burst length.
51 - lantiq,tx-burst-length
64 interrupt-names = "tx", "rx";
65 lantiq,tx-burst-length = <8>;
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| D | snps,dwmac.yaml | 311 snps,mtl-tx-config:
314 Multiple TX Queues parameters. Phandle to a node that
315 implements the 'tx-queues-config' object described in
318 tx-queues-config:
321 snps,tx-queues-to-use:
323 description: number of TX queues to be used in the driver
324 snps,tx-sched-wrr:
327 snps,tx-sched-wfq:
330 snps,tx-sched-dwrr:
336 - snps,tx-sched-wrr
[all …]
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| D | sff,sfp.yaml | 45 tx-fault-gpios:
51 tx-disable-gpios:
55 signal, active (Tx disable) high
67 GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)
68 output gpio signal (SFP+ only), low - low Tx rate, high - high Tx rate. Must
101 tx-disable-gpios = <&cps_gpio1 24 GPIO_ACTIVE_HIGH>;
102 tx-fault-gpios = <&cpm_gpio2 19 GPIO_ACTIVE_HIGH>;
122 tx-disable-gpios = <&cps_gpio1 29 GPIO_ACTIVE_HIGH>;
123 tx-fault-gpios = <&cps_gpio1 26 GPIO_ACTIVE_HIGH>;
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| /Documentation/netlink/specs/ |
| D | ethtool.yaml | 188 name: tx-max
200 name: tx
212 name: tx-push
218 name: tx-push-buf-len
221 name: tx-push-buf-len-max
243 name: tx-frag-count
259 name: tx-enabled
262 name: tx-active
265 name: tx-min-frag-size
428 name: tx-max
[all …]
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| /Documentation/devicetree/bindings/net/can/ |
| D | xilinx,can.yaml | 37 tx-fifo-depth:
39 description: CAN Tx fifo depth (Zynq, Axi CAN).
45 tx-mailbox-count:
47 description: CAN Tx mailbox buffer count (CAN FD)
81 - tx-fifo-depth
98 - tx-fifo-depth
116 - tx-mailbox-count
130 tx-fifo-depth = <0x40>;
142 tx-fifo-depth = <0x40>;
155 tx-mailbox-count = <0x20>;
[all …]
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| /Documentation/devicetree/bindings/media/ |
| D | amlogic,meson-ir-tx.yaml | 5 $id: http://devicetree.org/schemas/media/amlogic,meson-ir-tx.yaml#
21 - const: amlogic,meson-ir-tx
23 - const: amlogic,meson-g12a-ir-tx
24 - const: amlogic,meson-ir-tx
55 compatible = "amlogic,meson-g12a-ir-tx", "amlogic,meson-ir-tx";
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | renesas,dw-hdmi.yaml | 7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
29 - renesas,r8a77965-hdmi # for R-Car M3-N compatible HDMI TX
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| /Documentation/devicetree/bindings/usb/ |
| D | qcom,pmic-typec.yaml | 53 - description: Power Domain Signal TX - HardReset or CableReset signal TX
55 - description: Power Domain TX complete
57 - description: Power Domain TX fail
58 - description: Power Domain TX message discard
73 - const: sig-tx
75 - const: msg-tx
77 - const: msg-tx-failed
78 - const: msg-tx-discarded
168 "sig-tx",
170 "msg-tx",
[all …]
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| /Documentation/devicetree/bindings/serial/ |
| D | st,stm32-uart.yaml | 38 rx-tx-swap: true
46 enum: [ rx, tx ]
70 tx-threshold:
72 If value is set to 1, TX FIFO threshold is disabled.
96 rx-tx-swap: false
107 tx-threshold: false
127 dma-names = "rx", "tx";
129 tx-threshold = <4>;
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