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1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause4 ---5 $id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: SiFive Platform-Level Interrupt Controller (PLIC)11 SiFive SoCs and other RISC-V SoCs include an implementation of the12 Platform-Level Interrupt Controller (PLIC) high-level specification in13 the RISC-V Privileged Architecture specification. The PLIC connects all18 in an 4 core system with 2-way SMT, you have 8 harts and probably at least two21 Each interrupt can be enabled on per-context basis. Any context can claim[all …]