Home
last modified time | relevance | path

Searched full:uhs (Results 1 – 13 of 13) sorted by relevance

/Documentation/devicetree/bindings/mmc/
Dsocionext,uniphier-sd.yaml58 socionext,syscon-uhs-mode:
62 - description: phandle to syscon that configures UHS mode
65 A phandle to syscon with one argument that configures UHS mode.
104 pinctrl-names = "default", "uhs";
114 sd-uhs-sdr12;
115 sd-uhs-sdr25;
116 sd-uhs-sdr50;
Dcdns,sdhci.yaml51 cdns,phy-input-delay-sd-uhs-sdr12:
52 description: Value of the delay in the input path for SD UHS SDR12 timing
57 cdns,phy-input-delay-sd-uhs-sdr25:
58 description: Value of the delay in the input path for SD UHS SDR25 timing
63 cdns,phy-input-delay-sd-uhs-sdr50:
64 description: Value of the delay in the input path for SD UHS SDR50 timing
69 cdns,phy-input-delay-sd-uhs-ddr50:
70 description: Value of the delay in the input path for SD UHS DDR50 timing
Dsdhci-st.txt51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
Dmmc-controller.yaml140 sd-uhs-sdr12:
143 SD UHS SDR12 speed is supported.
145 sd-uhs-sdr25:
148 SD UHS SDR25 speed is supported.
150 sd-uhs-sdr50:
153 SD UHS SDR50 speed is supported.
155 sd-uhs-sdr104:
158 SD UHS SDR104 speed is supported.
160 sd-uhs-ddr50:
163 SD UHS DDR50 speed is supported.
[all …]
Dsdhci-am654.yaml80 description: Output tap delay for SD UHS SDR12 timing
86 description: Output tap delay for SD UHS SDR25 timing
92 description: Output tap delay for SD UHS SDR50 timing
98 description: Output tap delay for SD UHS SDR104 timing
104 description: Output tap delay for SD UHS DDR50 timing
150 description: Input tap delay for SD UHS SDR12 timing
156 description: Input tap delay for SD UHS SDR25 timing
Dbrcm,sdhci-brcmstb.yaml92 sd-uhs-sdr50;
93 sd-uhs-ddr50;
94 sd-uhs-sdr104;
Dk3-dw-mshc.txt59 sd-uhs-sdr12;
60 sd-uhs-sdr25;
Dsamsung,exynos-dw-mshc.yaml164 sd-uhs-sdr50;
165 sd-uhs-sdr104;
166 sd-uhs-ddr50;
Dsprd,sdhci-r11.yaml43 description: UHS mode pin control
53 "^sprd,phy-delay-(legacy|mmc-(ddr52|highspeed|hs[24]00|hs400es)|sd-(highspeed|uhs-sdr(50|104)))$":
Dusdhi6rol0.txt17 entry when the board requires distinct settings for UHS speeds.
Dsdhci-omap.txt5 For UHS devices which require tuning, the device tree should have a "cpu_thermal" node which maps t…
Dnuvoton,ma35d1-sdhci.yaml42 Should contain uhs mode pin ctrl.
Dmtk-sd.yaml86 should contain uhs mode pin ctrl.
357 sd-uhs-sdr104;