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/Documentation/devicetree/bindings/hwmon/
Dltc2990.txt15 2: V1-V2, V3, V4
16 3: TR1, V3, V4
17 4: TR1, V3-V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
27 2: TR2, V3 or V3-V4 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
/Documentation/hwmon/
Dpeci-dimmtemp.rst8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
Dpeci-cputemp.rst8 * Intel Xeon E5/E7 v3 server processors
9 Intel Xeon E5-14xx v3 family
10 Intel Xeon E5-24xx v3 family
11 Intel Xeon E5-16xx v3 family
12 Intel Xeon E5-26xx v3 family
13 Intel Xeon E5-46xx v3 family
14 Intel Xeon E7-48xx v3 family
15 Intel Xeon E7-88xx v3 family
/Documentation/devicetree/bindings/regulator/
Dmax1586-regulator.txt6 - v3-gain: integer specifying the V3 gain as per datasheet
16 v3-gain = <1000000>;
19 vcc_core: v3 {
/Documentation/devicetree/bindings/perf/
Darm,smmu-v3-pmcg.yaml4 $id: http://devicetree.org/schemas/perf/arm,smmu-v3-pmcg.yaml#
25 - const: arm,smmu-v3-pmcg
26 - const: arm,smmu-v3-pmcg
57 compatible = "arm,smmu-v3-pmcg";
65 compatible = "arm,smmu-v3-pmcg";
/Documentation/devicetree/bindings/riscv/
Dsunxi.yaml32 - description: ClockworkPi R-01 SoM and v3.14 board
34 - const: clockwork,r-01-clockworkpi-v3.14
37 - description: ClockworkPi R-01 SoM, v3.14 board, and DevTerm expansion
39 - const: clockwork,r-01-devterm-v3.14
40 - const: clockwork,r-01-clockworkpi-v3.14
/Documentation/devicetree/bindings/arm/
Damazon,al.yaml27 - description: Boards with Alpine V3 SoC
30 - amazon,al-alpine-v3-evp
31 - const: amazon,al-alpine-v3
Dactions.yaml40 - const: caninos,labrador-v3 # Labrador Core v3
/Documentation/devicetree/bindings/pci/
Dv3-v360epc-pci.txt1 V3 Semiconductor V360 EPC PCI bridge
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
10 first the base address of the V3 host bridge controller, 64KB
12 - interrupts: should contain a reference to the V3 error interrupt
29 operate the V3 host bridge.
34 compatible = "arm,integrator-ap-pci", "v3,v360epc-pci";
Dpcie-al.txt14 - "amazon,al-alpine-v3-pcie" for alpine_v3
32 compatible = "amazon,al-alpine-v3-pcie";
/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.yaml122 nvidia,pad-autocal-pull-down-offset-3v3:
127 nvidia,pad-autocal-pull-down-offset-3v3-timeout:
150 nvidia,pad-autocal-pull-up-offset-3v3:
162 nvidia,pad-autocal-pull-up-offset-3v3-timeout:
228 - const: sdmmc-3v3
232 - const: sdmmc-3v3-drv
237 - const: sdmmc-3v3-drv
257 - const: sdmmc-3v3
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
297 "sdmmc-3v3-drv", "sdmmc-1v8-drv";
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
26 - qcom,msm8996-gic-v3
27 - const: arm,gic-v3
28 - const: arm,gic-v3
200 const: arm,gic-v3-its
243 compatible = "arm,gic-v3";
260 compatible = "arm,gic-v3-its";
269 compatible = "arm,gic-v3";
286 compatible = "arm,gic-v3-its";
293 compatible = "arm,gic-v3-its";
/Documentation/userspace-api/media/v4l/
Dmetafmt-d4xx.rst77 * - __u8 Emitter mode (v3 only) (__u32 Laser mode for v1) [8_]
79 * - __u8 RFU byte (v3 only)
81 * - __u16 LED Power (v3 only)
110 - Size in bytes, include ID (v1:36, v3:40)
133 * - __u16 Calibration count (v3 only)
135 * - __u8 GPIO input data (v3 only)
137 * - __u32 Sub-preset info (v3 only)
139 * - __u8 reserved (v3 only)
/Documentation/devicetree/bindings/leds/
Dleds-powernv.txt5 - compatible : Should be "ibm,opal-v3-led".
18 compatible = "ibm,opal-v3-led";
/Documentation/devicetree/bindings/phy/
Dmarvell,mmp3-hsic-phy.yaml2 # Copyright 2019 Lubomir Rintel <lkundrak@v3.sk>
11 - Lubomir Rintel <lkundrak@v3.sk>
Dmarvell,mmp3-usb-phy.yaml2 # Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
11 - Lubomir Rintel <lkundrak@v3.sk>
/Documentation/arch/powerpc/
Delf_hwcaps.rst52 instructions that can be used differ between the v3.0B and v3.1B ISA
58 The Power ISA before v3.0 uses the term "category" to describe certain
209 The processor supports the v3.0B / v3.0C userlevel architecture. Processors
228 The processor supports the v3.1 userlevel architecture. Processors
/Documentation/devicetree/bindings/sound/
Dgoogle,chv3-i2s.yaml7 title: Google Chameleon v3 I2S device
13 I2S device for the Google Chameleon v3. The device handles both RX
/Documentation/devicetree/bindings/net/
Dfsl,fman-port.yaml24 - fsl,fman-v3-port-oh
25 - fsl,fman-v3-port-rx
26 - fsl,fman-v3-port-tx
/Documentation/devicetree/bindings/iommu/
Darm,smmu-v3.yaml4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
23 const: arm,smmu-v3
85 compatible = "arm,smmu-v3";
/Documentation/devicetree/bindings/usb/
Dmarvell,pxau2o-ehci.yaml2 # Copyright 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
11 - Lubomir Rintel <lkundrak@v3.sk>
/Documentation/ABI/testing/
Dsysfs-bus-rbd40 KernelVersion: v3.14
54 KernelVersion: v3.14
114 KernelVersion: v3.6
124 KernelVersion: v3.7
138 KernelVersion: v3.8
147 KernelVersion: v3.14
/Documentation/bpf/
Dclang-notes.rst15 Clang can select the eBPF ISA version using ``-mcpu=v3`` for example to select version 3.
32 Clang can generate atomic instructions by default when ``-mcpu=v3`` is
/Documentation/devicetree/bindings/misc/
Dolpc,xo1.75-ec.yaml2 # Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
21 - Lubomir Rintel <lkundrak@v3.sk>
/Documentation/devicetree/bindings/display/bridge/
Dchrontel,ch7033.yaml2 # Copyright (C) 2019,2020 Lubomir Rintel <lkundrak@v3.sk>
11 - Lubomir Rintel <lkundrak@v3.sk>

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