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/Documentation/devicetree/bindings/usb/
Dux500-usb.txt25 dmas = <&dma 38 0 0x2>, /* Logical - DevToMem */
27 <&dma 37 0 0x2>, /* Logical - DevToMem */
29 <&dma 36 0 0x2>, /* Logical - DevToMem */
31 <&dma 19 0 0x2>, /* Logical - DevToMem */
33 <&dma 18 0 0x2>, /* Logical - DevToMem */
35 <&dma 17 0 0x2>, /* Logical - DevToMem */
37 <&dma 16 0 0x2>, /* Logical - DevToMem */
39 <&dma 39 0 0x2>, /* Logical - DevToMem */
Dqcom,pmic-typec.yaml143 interrupts = <0x2 0x15 0x00 IRQ_TYPE_EDGE_RISING>,
144 <0x2 0x15 0x01 IRQ_TYPE_EDGE_BOTH>,
145 <0x2 0x15 0x02 IRQ_TYPE_EDGE_RISING>,
146 <0x2 0x15 0x03 IRQ_TYPE_EDGE_BOTH>,
147 <0x2 0x15 0x04 IRQ_TYPE_EDGE_RISING>,
148 <0x2 0x15 0x05 IRQ_TYPE_EDGE_RISING>,
149 <0x2 0x15 0x06 IRQ_TYPE_EDGE_BOTH>,
150 <0x2 0x15 0x07 IRQ_TYPE_EDGE_RISING>,
151 <0x2 0x17 0x00 IRQ_TYPE_EDGE_RISING>,
152 <0x2 0x17 0x01 IRQ_TYPE_EDGE_RISING>,
[all …]
/Documentation/devicetree/bindings/power/supply/
Dqcom,pmi8998-charger.yaml69 interrupts = <0x2 0x12 0x2 IRQ_TYPE_EDGE_BOTH>,
70 <0x2 0x13 0x4 IRQ_TYPE_EDGE_BOTH>,
71 <0x2 0x13 0x6 IRQ_TYPE_EDGE_RISING>,
72 <0x2 0x16 0x1 IRQ_TYPE_EDGE_RISING>;
/Documentation/devicetree/bindings/misc/
Dpvpanic-mmio.txt21 #size-cells = <0x2>;
22 #address-cells = <0x2>;
26 reg = <0x0 0x9060000 0x0 0x2>;
/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-mdma.yaml19 0x2: High
24 0x2: Source address pointer is incremented after each data transfer
28 0x2: Destination address pointer is incremented after each data transfer
33 0x2: word (32bit)
38 0x2: word (32bit)
45 0x2: Each MDMA request triggers a repeated block transfer
Dst,stm32-dma3.yaml64 0x2: low priority, high weight
68 0x2: FIFO of 8 bytes (2^2+1)
94 0x2: at LLI level, the transfer complete event is generated at the end
/Documentation/userspace-api/media/v4l/
Dsubdev-image-processing-full.svg132 x2="-30.736099"
151 x2="980.06598"
265 x2="61.001762"
272 x2="61.001762"
279 x2="155.00177"
286 x2="155.00177"
357 x2="407.82376"
364 x2="407.82376"
371 x2="508.00977"
378 x2="508.00977"
[all …]
Dsubdev-image-processing-scaling-multi-source.svg163 x2="47.899757"
170 x2="47.899757"
177 x2="141.89977"
184 x2="141.89977"
273 x2="380.72174"
280 x2="380.72174"
287 x2="480.90775"
294 x2="480.90775"
326 x2="972.93402"
377 x2="-38.6343"
[all …]
Dsubdev-image-processing-crop.svg177 x2="61.899757"
184 x2="61.899757"
191 x2="155.89977"
198 x2="155.89977"
230 x2="637.93402"
281 x2="-38.6343"
/Documentation/input/devices/
Dalps.rst95 byte 1: X7 X6 X5 X4 X3 X2 X1 X0
110 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
122 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
140 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
143 byte 4: X7 X6 X5 X4 X3 X2 X1 X0
167 byte 4: 0 mt x3 x2 y3 y2 y1 y0
180 byte 1: 0 x8 x7 x6 x5 x4 x3 x2
193 byte 1: 0 x6 x5 x4 x3 x2 x1 x0
210 byte 3: 0 1 x3 x2 y3 y2 y1 y0
220 byte 0: 0 1 x7 x6 x5 x4 x3 x2
[all …]
/Documentation/devicetree/bindings/powerpc/opal/
Doppanel-opal.txt6 - #lines : Number of lines on the operator panel e.g. <0x2>.
12 #lines = <0x2>;
/Documentation/gpu/
Dafbc.rst211 * Component 1: Cb(8, 2x2 subsampled)
212 * Component 2: Cr(8, 2x2 subsampled)
218 * Component 1: Cb(10, 2x2 subsampled)
219 * Component 2: Cr(10, 2x2 subsampled)
226 * Component 0: Cb(8, 2x2 subsampled)
227 * Component 1: Cr(8, 2x2 subsampled)
234 * Component 0: Cb(10, 2x2 subsampled)
235 * Component 1: Cr(10, 2x2 subsampled)
/Documentation/doc-guide/
Dsvg_image.svg6 <line x1="0" y1="200" x2="700" y2="200" stroke="black" stroke-width="20px"/>
8 <line x1="180" y1="370" x2="500" y2="50" stroke="black" stroke-width="15px"/>
/Documentation/hwmon/
Dk10temp.rst10 Socket AM2+: Quad-Core Opteron, Phenom (II) X3/X4, Athlon X2 (but see below)
12 Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II
18 Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra)
/Documentation/devicetree/bindings/display/ti/
Dti,k2g-dss.yaml91 clocks = <&k2g_clks 0x2 0>,
92 <&k2g_clks 0x2 1>;
96 power-domains = <&k2g_pds 0x2>;
/Documentation/devicetree/bindings/regulator/
Drenesas,raa215300.yaml67 x2: x2-clock {
82 clocks = <&x2>;
/Documentation/devicetree/bindings/nvmem/
Dmediatek,efuse.yaml67 reg = <0x184 0x2>;
79 reg = <0x186 0x2>;
91 reg = <0x188 0x2>;
/Documentation/devicetree/bindings/powerpc/fsl/
Dlbc.txt23 0x2 0x0 0xfd810000 0x00010000>;
39 reg = <0x2 0x0 0x10000>;
/Documentation/devicetree/bindings/net/
Ddavicom,dm9000.yaml54 reg = <0xa8000000 0x2>, <0xa8000002 0x2>;
/Documentation/arch/powerpc/
Dptrace.rst45 #define PPC_DEBUG_FEATURE_INSN_BP_MASK 0x2
58 #define PPC_BREAKPOINT_TRIGGER_READ 0x2
63 #define PPC_BREAKPOINT_MODE_RANGE_EXCLUSIVE 0x2
71 #define PPC_BREAKPOINT_CONDITION_OR 0x2
/Documentation/devicetree/bindings/pci/
D83xx-512x-pci.txt16 0x7000 0x0 0x0 0x2 &ipic 18 0x8
22 0x7800 0x0 0x0 0x2 &ipic 18 0x8
/Documentation/devicetree/bindings/phy/
Dfsl,imx8qm-hsio.yaml57 | pciea-x2-sata | PCIEA| PCIEA| SATA |
59 | pciea-x2-pcieb | PCIEA| PCIEA| PCIEB|
64 enum: [ pciea-x2-sata, pciea-x2-pcieb, pciea-pcieb-sata]
/Documentation/devicetree/bindings/mtd/
Dst,stm32-fmc2-nand.yaml141 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
142 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
143 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
/Documentation/devicetree/bindings/memory-controllers/
Dst,stm32-fmc2-ebi.yaml114 dmas = <&mdma1 20 0x2 0x12000a02 0x0 0x0>,
115 <&mdma1 20 0x2 0x12000a08 0x0 0x0>,
116 <&mdma1 21 0x2 0x12000a0a 0x0 0x0>;
/Documentation/devicetree/bindings/pinctrl/
Dfsl,imxrt1050.yaml76 <0x0EC 0x2DC 0x000 0x2 0x0 0xf1>,
77 <0x0F0 0x2E0 0x000 0x2 0x0 0xf1>;

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