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| /Documentation/devicetree/bindings/access-controllers/ |
| D | access-controllers.yaml | 4 $id: http://devicetree.org/schemas/access-controllers/access-controllers.yaml#
7 title: Generic Domain Access Controllers
13 Common access controllers properties
15 Access controllers are in charge of stating which of the hardware blocks under
18 or a group of hardware blocks. An access controller's domain is the set of
19 resources covered by the access controller.
21 This device tree binding can be used to bind devices to their access
22 controller provided by access-controllers property. In this case, the device
23 is a consumer and the access controller is the provider.
25 An access controller can be represented by any node in the device tree and
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| /Documentation/admin-guide/LSM/ |
| D | Smack.rst | 9 Smack is the Simplified Mandatory Access Control Kernel.
10 Smack is a kernel based implementation of mandatory access
13 Smack is not the only Mandatory Access Control scheme
14 available for Linux. Those new to Mandatory Access Control
33 access to systems that use them as Smack does.
50 load the Smack access rules
53 report if a process with one label has access
85 Used to make access control decisions. In almost all cases
95 label does not allow all of the access permitted to a process
102 the Smack rule (more below) that permitted the write access
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| /Documentation/security/ |
| D | landlock.rst | 12 Landlock's goal is to create scoped access-control (i.e. sandboxing). To
20 system security policy enforced by other access control mechanisms (e.g. DAC,
21 LSM). A Landlock rule shall not interfere with other access-controls enforced
31 Guiding principles for safe access controls
34 * A Landlock rule shall be focused on access control on kernel objects instead
40 * Kernel access check shall not slow down access request from unsandboxed
47 Cf. `File descriptor access rights`_.
52 Inode access rights
55 All access rights are tied to an inode and what can be accessed through it.
64 File descriptor access rights
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| /Documentation/core-api/ |
| D | unaligned-memory-access.rst | 14 when it comes to memory access. This document presents some details about
19 The definition of an unaligned access
26 access.
28 The above may seem a little vague, as memory access can happen in different
32 which will compile to multiple-byte memory access instructions, namely when
47 of memory access. However, we must consider ALL supported architectures;
52 Why unaligned access is bad
55 The effects of performing an unaligned memory access vary from architecture
62 happen. The exception handler is able to correct the unaligned access,
66 unaligned access to be corrected.
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| D | protection-keys.rst | 23 (PKRU). Each of these is a 32-bit register storing two bits (Access Disable
32 access only and have no effect on instruction fetches.
62 to change access permissions to memory covered with a key. In this example
73 gain access, do the update, then remove its write access::
104 That should be true whether something() is a direct access to 'ptr'
109 or when the kernel does the access on the application's behalf like
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| /Documentation/arch/arm/ |
| D | mem_alignment.rst | 5 Too many problems popped up because of unnoticed misaligned memory access in
14 unaligned memory access in general. If those access are predictable, you
16 alignment trap can fixup misaligned access for the exception cases, but at
20 trap to SIGBUS any code performing unaligned access (good for debugging bad
21 code), or even fixup the access by software like for kernel code. The later
36 0 A user process performing an unaligned memory access
42 performing the unaligned access. This is of course
47 performing the unaligned access.
59 information on unaligned access occurrences plus the current mode of
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| /Documentation/admin-guide/mm/damon/ |
| D | start.rst | 37 Snapshot Data Access Patterns
40 The commands below show the memory access pattern of a program at the moment of
46 0 addr [85.541 TiB , 85.541 TiB ) (57.707 MiB ) access 0 % age 10.400 s
47 1 addr [85.541 TiB , 85.542 TiB ) (413.285 MiB) access 0 % age 11.400 s
48 2 addr [127.649 TiB , 127.649 TiB) (57.500 MiB ) access 0 % age 1.600 s
49 3 addr [127.649 TiB , 127.649 TiB) (32.500 MiB ) access 0 % age 500 ms
50 4 addr [127.649 TiB , 127.649 TiB) (9.535 MiB ) access 100 % age 300 ms
51 5 addr [127.649 TiB , 127.649 TiB) (8.000 KiB ) access 60 % age 0 ns
52 6 addr [127.649 TiB , 127.649 TiB) (6.926 MiB ) access 0 % age 1 s
53 7 addr [127.998 TiB , 127.998 TiB) (120.000 KiB) access 0 % age 11.100 s
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| D | index.rst | 4 DAMON: Data Access MONitor
7 :doc:`DAMON </mm/damon/index>` allows light-weight data access monitoring.
8 Using DAMON, users can analyze the memory access patterns of their systems and
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| /Documentation/mm/damon/ |
| D | design.rst | 32 overhead/accuracy control and access-aware system operations on top of the
46 For data access monitoring and additional low level work, DAMON needs a set of
48 the given target address space. For example, below two operations for access
52 2. Access check of specific address range in the target space.
67 Also, if some architectures or devices support special optimized access check
121 PTE Accessed-bit Based Access Check
125 Accessed-bit for basic access checks. Only one difference is the way of
159 Access Frequency Monitoring
163 duration. The resolution of the access frequency is controlled by setting
165 access to each page per ``sampling interval`` and aggregates the results. In
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| D | index.rst | 4 DAMON: Data Access MONitor
7 DAMON is a Linux kernel subsystem that provides a framework for data access
19 access-aware fashion. Because the features are also exposed to the :doc:`user
27 spaces </admin-guide/mm/damon/index>` can do access-aware system operations
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| /Documentation/ABI/testing/ |
| D | sysfs-class-power | 9 Access: Read
18 Access: Read
27 Access: Read
36 Access: Read
58 Access: Read
76 Access: Read
89 Access: Read
98 Access: Read, Write
118 Access: Read
142 Access: Read
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| D | sysfs-class-power-ltc4162l | 7 Access: Read
25 Access: Read
35 Access: Read
45 Access: Read
61 Access: Read, Write
80 Access: Read, Write
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| D | sysfs-driver-input-exc3000 | 6 Access: Read
15 Access: Read
24 Access: Read
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| /Documentation/devicetree/bindings/bus/ |
| D | st,stm32-etzpc.yaml | 41 "#access-controller-cells":
54 - access-controllers
61 - "#access-controller-cells"
68 // In this example, the usart2 device refers to rifsc as its access
70 // Access rights are verified before creating devices.
81 #access-controller-cells = <1>;
94 access-controllers = <&etzpc 17>;
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| D | st,stm32mp25-rifsc.yaml | 25 Alternatively, the RISUP logic controlling the device port access to a
57 "#access-controller-cells":
70 - access-controllers
77 - "#access-controller-cells"
86 // Access rights are verified before creating devices.
95 #access-controller-cells = <1>;
103 access-controllers = <&rifsc 32>;
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| /Documentation/driver-api/mmc/ |
| D | mmc-dev-parts.rst | 15 Read and write access is provided to the two MMC boot partitions. Due to
18 platform, write access is disabled by default to reduce the chance of
21 To enable write access to /dev/mmcblkXbootY, disable the forced read-only
22 access with::
26 To re-enable read-only access::
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| /Documentation/devicetree/bindings/spi/ |
| D | sprd,spi-adi.yaml | 15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
21 48 hardware channels to access analog chip. For 2 software read/write channels,
22 users should set ADI registers to access analog chip. For hardware channels,
25 then users can access the mapped analog chip address by this hardware channel
31 the analog chip address where user want to access by hardware components.
33 Since we have multi-subsystems will use unique ADI to access analog chip, when
76 - description: The analog chip address where user want to access by
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| /Documentation/admin-guide/mm/ |
| D | numaperf.rst | 37 pair may be organized into different ranked access classes to represent
40 the highest access class, 0. Any given target may have one or more
46 relationship for the access class "0" memory initiators and targets::
54 A memory initiator may have multiple memory targets in the same access
56 nodes' access characteristics share the same performance relative to other
57 linked initiator nodes. Each target within an initiator's access class,
60 The access class "1" is used to allow differentiation between initiators
62 IO initiators such as GPUs and NICs. Unlike access class 0, only
72 memory node's access class 0 initiators as follows::
77 are linked under the this access's initiators.
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| /Documentation/userspace-api/ |
| D | landlock.rst | 7 Landlock: unprivileged access control
14 filesystem or network access) for a set of processes. Because Landlock
16 new security layers in addition to the existing system-wide access-controls.
41 `filesystem access rights`.
45 and the related actions are defined with `network access rights`.
59 to be explicit about the denied-by-default access rights.
95 version, and only use the available subset of access rights:
177 for the ruleset creation, by filtering access rights according to the Landlock
181 For network access-control, we can add a set of rules that allow to use a port
196 allowing read access to ``/usr`` while denying all other handled accesses for
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| /Documentation/sound/cards/ |
| D | hdspm.rst | 64 * access-mode -- MMAP (memory mapped), Not interleaved (PCM_NON-INTERLEAVED)
125 * Access -- Read Write
141 * Access -- Read Write
159 * Access -- Read Write
178 * Access -- Read Write
195 * Access -- Read Write
207 * Access -- Read Write
220 * Access -- Read Write
235 * Access -- Read Write
255 * Access -- Read Write
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| /Documentation/arch/s390/ |
| D | vfio-ap-locking.rst | 30 controls access to all fields contained within each matrix_mdev
46 The KVM Lock (kvm->lock) controls access to the state data for a KVM guest. This
66 The Guests Lock (matrix_dev->guests_lock) controls access to the
71 1. To control access to the KVM pointer (matrix_mdev->kvm) while the vfio_ap
88 It is not necessary to take the Guests Lock to access the KVM pointer if the
91 held in order to access the KVM pointer since it is set and cleared under the
94 needs to access the KVM pointer only for the purposes of setting or clearing IRQ
111 The PQAP Hook Lock is a r/w semaphore that controls access to the function
|
| /Documentation/bpf/ |
| D | prog_cgroup_sysctl.rst | 22 ``BPF_PROG_TYPE_CGROUP_SYSCTL`` provides access to the following context from
39 value to the field can be used to access part of sysctl value starting from
40 specified ``file_pos``. Not all sysctl support access with ``file_pos !=
52 * ``0`` means "reject access to sysctl";
53 * ``1`` means "proceed with access".
62 helpers focus on providing access to these properties:
98 See `test_sysctl_prog.c`_ for an example of BPF program in C that access
100 the result to make decision whether to allow or deny access to sysctl.
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| /Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 203 calxeda,smmu-secure-config-access:
207 access to SMMU configuration registers. In this case non-secure aliases of
294 - description: bus clock required for downstream bus access and for
304 - description: interface clock required to access smmu's registers
306 - description: bus clock required for memory access
307 - description: bus clock required for GPU memory access
316 - description: interface clock required to access mnoc's registers
318 - description: interface clock required to access smmu's registers
336 - description: bus clock required for downstream bus access and for
346 - description: interface clock required to access smmu's registers
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | intel,ixp4xx-expansion-bus-controller.yaml | 10 The IXP4xx expansion bus controller handles access to devices on the
37 description: The IXP4xx has a peculiar MMIO access scheme, as it changes
38 the access pattern for words (swizzling) on the bus depending on whether
92 intel,ixp4xx-eb-byte-access-on-halfword = <1>;
94 intel,ixp4xx-eb-byte-access = <0>;
105 intel,ixp4xx-eb-byte-access = <1>;
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| /Documentation/arch/powerpc/ |
| D | cxlflash.rst | 27 user space application direct access to Flash storage.
33 special path for user space access, and performing error recovery. It
46 either raw access to the entire LUN (referred to as direct
47 or physical LUN access) or access to a kernel/AFU-mediated
48 partition of the LUN (referred to as virtual LUN access). The
90 access to the Flash from user space (without requiring a system call).
93 block library to enable this user space access. The driver supports
115 Applications intending to get access to the CXL Flash from user
121 specifically for devices (LUNs) operating in user space access
135 device (LUN) via user space access need to use the services provided
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