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/Documentation/devicetree/bindings/bus/
Dnvidia,tegra20-gmi.txt4 external memory. Can be used to attach various high speed devices such as
10 - compatible : Should contain one of the following:
11 For Tegra20 must contain "nvidia,tegra20-gmi".
12 For Tegra30 must contain "nvidia,tegra30-gmi".
13 - reg: Should contain GMI controller registers location and length.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Must include the following entries: "gmi"
16 - resets : Must contain an entry for each entry in reset-names.
17 - reset-names : Must include the following entries: "gmi"
18 - #address-cells: The number of cells used to represent physical base
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/Documentation/fb/
Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
21 # Active Time 25.422 us 15.253 ms
28 mode "640x480-60"
31 timings 39722 48 16 33 10 96 2 endmode mode "480x640-60"
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
46 # Active Time 20.317 us 12.800 ms
52 mode "640x480-75"
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
67 # Active Time 17.778 us 11.093 ms
73 mode "640x480-85"
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/Documentation/firmware-guide/acpi/
Dgpio-properties.rst1 .. SPDX-License-Identifier: GPL-2.0
31 ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
34 Package () { "reset-gpios", Package () { ^BTH, 1, 1, 0 } },
35 Package () { "shutdown-gpios", Package () { ^BTH, 0, 0, 0 } },
55 active low or high, the "active_low" argument can be used here. Setting
56 it to 1 marks the GPIO as active low.
61 In our Bluetooth example the "reset-gpios" refers to the second GpioIo()
70 +-------------+-------------+-----------------------------------------------+
74 +-------------+-------------+-----------------------------------------------+
76 +-------------+-------------+-----------------------------------------------+
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/Documentation/driver-api/gpio/
Dintro.rst17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
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/Documentation/devicetree/bindings/media/i2c/
Dov7670.txt8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
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Dgalaxycore,gc0308.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
18 - $ref: /schemas/media/video-interface-devices.yaml#
23 - const: galaxycore,gc0308
24 - items:
25 - const: galaxycore,gc0309
26 - const: galaxycore,gc0308
35 reset-gpios:
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/Documentation/devicetree/bindings/serial/
Drs485.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7606.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
14 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7605-4.pdf
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ad7606_7606-6_7606-4.pdf
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7606B.pdf
17 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7616.pdf
22 - adi,ad7605-4
23 - adi,ad7606-4
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/Documentation/devicetree/bindings/sound/
Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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/Documentation/devicetree/bindings/regulator/
Dgpio-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: regulator.yaml#
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
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Dfixed-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/fixed-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
16 expected to have the regulator-min-microvolt and regulator-max-microvolt
20 - $ref: regulator.yaml#
21 - if:
25 const: regulator-fixed-clock
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/Documentation/devicetree/bindings/hwmon/
Dti,ina2xx.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Krzysztof Kozlowski <krzk@kernel.org>
14 The INA209 is a high-side current shunt and power monitor with
23 - ti,ina209
24 - ti,ina219
25 - ti,ina220
26 - ti,ina226
27 - ti,ina230
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/Documentation/devicetree/bindings/rtc/
Drtc-omap.txt4 - compatible:
5 - "ti,da830-rtc" - for RTC IP used similar to that on DA8xx SoC family.
6 - "ti,am3352-rtc" - for RTC IP used similar to that on AM335x SoC family.
7 This RTC IP has special WAKE-EN Register to enable
11 - "ti,am4372-rtc" - for RTC IP used similar to that on AM437X SoC family.
12 - reg: Address range of rtc register set
13 - interrupts: rtc timer, alarm interrupts in order
16 - system-power-controller: whether the rtc is controlling the system power
18 - clocks: Any internal or external clocks feeding in to rtc
19 - clock-names: Corresponding names of the clocks
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/Documentation/userspace-api/gpio/
Dgpio-v2-line-set-values-ioctl.rst1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_LINE_SET_VALUES_IOCTL - Set the values of requested output lines.
26 :c:type:`request.fd<gpio_v2_line_request>` by gpio-v2-get-line-ioctl.rst.
38 The values set are logical, indicating if the line is to be active or inactive.
40 values (active/inactive) and physical values (high/low).
41 If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is not set then active is high and inactive
42 is low. If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is set then active is low and
43 inactive is high.
53 On error -1 and the ``errno`` variable is set appropriately.
54 Common error codes are described in error-codes.rst.
Dgpio-handle-set-line-values-ioctl.rst1 .. SPDX-License-Identifier: GPL-2.0
10 gpio-v2-line-set-values-ioctl.rst.
15 GPIO_HANDLE_SET_LINE_VALUES_IOCTL - Set the values of all requested output lines.
29 :c:type:`request.fd<gpiohandle_request>` by gpio-get-linehandle-ioctl.rst.
39 The values set are logical, indicating if the line is to be active or inactive.
41 values (active/inactive) and physical values (high/low).
42 If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is not set then active is high and
43 inactive is low. If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is set then active is low
44 and inactive is high.
54 On error -1 and the ``errno`` variable is set appropriately.
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Dgpio-v2-line-get-values-ioctl.rst1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_LINE_GET_VALUES_IOCTL - Get the values of requested lines.
26 :c:type:`request.fd<gpio_v2_line_request>` by gpio-v2-get-line-ioctl.rst.
37 The values returned are logical, indicating if the line is active or inactive.
39 values (high/low) and logical values (active/inactive).
40 If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is not set then high is active and low is
41 inactive. If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is set then low is active and
42 high is inactive.
57 On error -1 and the ``errno`` variable is set appropriately.
58 Common error codes are described in error-codes.rst.
Dgpio-handle-get-line-values-ioctl.rst1 .. SPDX-License-Identifier: GPL-2.0
10 gpio-v2-line-get-values-ioctl.rst.
15 GPIOHANDLE_GET_LINE_VALUES_IOCTL - Get the values of all requested lines.
29 :c:type:`request.fd<gpiohandle_request>` by gpio-get-linehandle-ioctl.rst.
39 The values returned are logical, indicating if the line is active or inactive.
41 values (high/low) and logical values (active/inactive).
42 If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is not set then high is active and
43 low is inactive. If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is set then low is active
44 and high is inactive.
62 On error -1 and the ``errno`` variable is set appropriately.
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/Documentation/devicetree/bindings/watchdog/
Daspeed,ast2400-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/aspeed,ast2400-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@codeconstruct.com.au>
15 - aspeed,ast2400-wdt
16 - aspeed,ast2500-wdt
17 - aspeed,ast2600-wdt
29 aspeed,reset-type:
32 - cpu
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/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra20-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-gpio
18 - nvidia,tegra30-gpio
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Dbrcm,brcmstb-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The controller's registers are organized as sets of eight 32-bit
15 - Doug Berger <opendmb@gmail.com>
16 - Florian Fainelli <f.fainelli@gmail.com>
21 - enum:
22 - brcm,bcm7445-gpio
23 - const: brcm,brcmstb-gpio
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/Documentation/devicetree/bindings/net/
Dsff,sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
11 - Russell King <linux@armlinux.org.uk>
16 - sff,sfp # for SFP modules
17 - sff,sff # for soldered down SFF modules
19 i2c-bus:
24 maximum-power-milliwatt:
29 allowable by a module in the slot, in milli-Watts. Presently, modules can
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/Documentation/devicetree/bindings/reset/
Dsnps,dw-reset.txt9 - compatible: should be one of the following.
10 "snps,dw-high-reset" - for active high configuration
11 "snps,dw-low-reset" - for active low configuration
13 - reg: physical base address of the controller and length of memory mapped
16 - #reset-cells: must be 1.
20 dw_rst_1: reset-controller@0000 {
21 compatible = "snps,dw-high-reset";
23 #reset-cells = <1>;
26 dw_rst_2: reset-controller@1000 {
27 compatible = "snps,dw-low-reset";
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/Documentation/devicetree/bindings/power/reset/
Dgpio-restart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-restart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
21 is configured as an output, and driven active, triggering a level triggered reset condition.
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
24 active->inactive edge, triggering negative edge triggered reset. After a delay specified by
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/Documentation/devicetree/bindings/media/
Dallwinner,sun4i-a10-csi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/allwinner,sun4i-a10-csi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
13 description: |-
20 - const: allwinner,sun4i-a10-csi1
21 - const: allwinner,sun7i-a20-csi0
22 - items:
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/Documentation/devicetree/bindings/display/panel/
Dpanel-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
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