Searched +full:active +full:- +full:low (Results 1 – 25 of 404) sorted by relevance
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6358.txt | 5 which can either be controlled by software (exporting the 74x164 as spi-gpio.
10 - compatible : should be "brcm,bcm6358-leds".
11 - #address-cells : must be 1.
12 - #size-cells : must be 0.
13 - reg : BCM6358 LED controller address and size.
16 - brcm,clk-div : SCK signal divider. Possible values are 1, 2, 4 and 8.
18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
21 Each LED is represented as a sub-node of the brcm,bcm6358-leds device.
23 LED sub-node required properties:
24 - reg : LED pin number (only LEDs 0 to 31 are valid).
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| D | leds-bcm6328.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm6328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
17 as spi-gpio. See
21 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
29 explained later in brcm,link-signal-sources). Even if a LED is hardware
34 Each LED is represented as a sub-node of the brcm,bcm6328-leds device.
38 const: brcm,bcm6328-leds
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| /Documentation/devicetree/bindings/power/supply/ |
| D | maxim,max8903.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
13 - $ref: power-supply.yaml#
19 dok-gpios:
21 description: Valid DC power has been detected (active low, input)
23 uok-gpios:
25 description: Valid USB power has been detected (active low, input)
27 cen-gpios:
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| /Documentation/driver-api/gpio/ |
| D | intro.rst | 17 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
25 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
26 non-dedicated pin can be configured as a GPIO; and most chips have at least
31 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
36 - Output values are writable (high=1, low=0). Some chips also have
38 value might be driven, supporting "wire-OR" and similar schemes for the
41 - Input values are likewise readable (1, 0). Some chips support readback
42 of pins configured as "output", which is very useful in such "wire-OR"
44 input de-glitch/debounce logic, sometimes with software controls.
46 - Inputs can often be used as IRQ signals, often edge triggered but
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | ov7670.txt | 8 - compatible: should be "ovti,ov7670"
9 - clocks: reference to the xclk input clock.
10 - clock-names: should be "xclk".
13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
17 - reset-gpios: reference to the GPIO connected to the resetb pin, if any.
18 Active is low.
19 - powerdown-gpios: reference to the GPIO connected to the pwdn pin, if any.
20 Active is high.
21 - ov7670,pclk-hb-disable: a boolean property to suppress pixel clock output
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| D | tvp7002.txt | 7 - compatible : Must be "ti,tvp7002"
10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
16 - pclk-sample: Clock polarity of the bus. Default value when this property is
19 - sync-on-green-active: Active state of Sync-on-green signal property of the
21 0 = Normal Operation (Active Low, Default)
24 - field-even-active: Active-high Field ID output polarity control of the bus.
27 0 = Normal Operation (Active Low, Default)
31 video-interfaces.txt.
44 hsync-active = <1>;
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| D | aptina,mt9v111.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacopo Mondi <jacopo@jmondi.org>
13 The Aptina MT9V111 is a 1/4-Inch VGA-format digital image sensor with a core
16 The sensor has an active pixel array of 640x480 pixels and can output a number
17 of image resolutions and formats controllable through a simple two-wires
30 enable-gpios:
31 description: Enable signal, pin name "OE#". Active low.
34 standby-gpios:
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| /Documentation/devicetree/bindings/net/ |
| D | mdio-mux-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/mdio-mux-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
17 - $ref: /schemas/net/mdio-mux.yaml#
21 const: mdio-mux-gpio
30 - compatible
31 - gpios
36 - |
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| /Documentation/hwmon/ |
| D | ds620.rst | 20 -----------
23 high and low temperature limits which can be user defined (i.e. programmed
24 into non-volatile on-chip registers). Temperature range is -55 degree Celsius
30 PO is always low. If .pomode == 1, the thermostat is in PO_LOW mode. I.e., the
31 output pin PO becomes active when the temperature falls below temp1_min and
32 stays active until the temperature goes above temp1_max.
35 output pin becomes active when the temperature goes above temp1_max and stays
36 active until the temperature falls below temp1_min.
38 The PO output pin of the DS620 operates active-low.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/reset/gpio-restart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sebastian Reichel <sre@kernel.org>
17 'open-source' is not found, the GPIO line will be driven in the inactive state. Otherwise its
21 is configured as an output, and driven active, triggering a level triggered reset condition.
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
24 active->inactive edge, triggering negative edge triggered reset. After a delay specified by
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| /Documentation/devicetree/bindings/sound/ |
| D | ti,tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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| /Documentation/userspace-api/gpio/ |
| D | gpio-v2-line-set-values-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_LINE_SET_VALUES_IOCTL - Set the values of requested output lines.
26 :c:type:`request.fd<gpio_v2_line_request>` by gpio-v2-get-line-ioctl.rst.
38 The values set are logical, indicating if the line is to be active or inactive.
40 values (active/inactive) and physical values (high/low).
41 If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is not set then active is high and inactive
42 is low. If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is set then active is low and
53 On error -1 and the ``errno`` variable is set appropriately.
54 Common error codes are described in error-codes.rst.
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| D | gpio-handle-set-line-values-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 gpio-v2-line-set-values-ioctl.rst.
15 GPIO_HANDLE_SET_LINE_VALUES_IOCTL - Set the values of all requested output lines.
29 :c:type:`request.fd<gpiohandle_request>` by gpio-get-linehandle-ioctl.rst.
39 The values set are logical, indicating if the line is to be active or inactive.
41 values (active/inactive) and physical values (high/low).
42 If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is not set then active is high and
43 inactive is low. If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is set then active is low
54 On error -1 and the ``errno`` variable is set appropriately.
55 Common error codes are described in error-codes.rst.
|
| D | gpio-v2-line-get-values-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 GPIO_V2_LINE_GET_VALUES_IOCTL - Get the values of requested lines.
26 :c:type:`request.fd<gpio_v2_line_request>` by gpio-v2-get-line-ioctl.rst.
37 The values returned are logical, indicating if the line is active or inactive.
39 values (high/low) and logical values (active/inactive).
40 If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is not set then high is active and low is
41 inactive. If ``GPIO_V2_LINE_FLAG_ACTIVE_LOW`` is set then low is active and
57 On error -1 and the ``errno`` variable is set appropriately.
58 Common error codes are described in error-codes.rst.
|
| D | gpio-handle-get-line-values-ioctl.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 gpio-v2-line-get-values-ioctl.rst.
15 GPIOHANDLE_GET_LINE_VALUES_IOCTL - Get the values of all requested lines.
29 :c:type:`request.fd<gpiohandle_request>` by gpio-get-linehandle-ioctl.rst.
39 The values returned are logical, indicating if the line is active or inactive.
41 values (high/low) and logical values (active/inactive).
42 If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is not set then high is active and
43 low is inactive. If ``GPIOHANDLE_REQUEST_ACTIVE_LOW`` is set then low is active
62 On error -1 and the ``errno`` variable is set appropriately.
63 Common error codes are described in error-codes.rst.
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| /Documentation/devicetree/bindings/serial/ |
| D | rs485.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 direction for the built-in half-duplex mode. The properties described
11 hereafter shall be given to a half-duplex capable UART node.
14 - Rob Herring <robh@kernel.org>
17 rs485-rts-delay:
18 description: prop-encoded-array <a b>
19 $ref: /schemas/types.yaml#/definitions/uint32-array
21 - description: Delay between rts signal and beginning of data sent in
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| /Documentation/devicetree/bindings/gpio/ |
| D | nvidia,tegra20-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra20-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra20 - Tegra210)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-gpio
18 - nvidia,tegra30-gpio
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| D | brcm,brcmstb-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/brcm,brcmstb-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The controller's registers are organized as sets of eight 32-bit
15 - Doug Berger <opendmb@gmail.com>
16 - Florian Fainelli <f.fainelli@gmail.com>
21 - enum:
22 - brcm,bcm7445-gpio
23 - const: brcm,brcmstb-gpio
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| /Documentation/devicetree/bindings/media/ |
| D | pxa-camera.txt | 4 - compatible: Should be "marvell,pxa270-qci"
5 - reg: register base and size
6 - interrupts: the interrupt number
7 - any required generic properties defined in video-interfaces.txt
10 - clocks: input clock (see clock-bindings.txt)
11 - clock-output-names: should contain the name of the clock driving the
13 - clock-frequency: host interface is driving MCLK, and MCLK rate is this rate
18 compatible = "marvell,pxa270-qci";
23 clock-names = "ciclk";
24 clock-frequency = <50000000>;
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| /Documentation/devicetree/bindings/reset/ |
| D | snps,dw-reset.txt | 9 - compatible: should be one of the following.
10 "snps,dw-high-reset" - for active high configuration
11 "snps,dw-low-reset" - for active low configuration
13 - reg: physical base address of the controller and length of memory mapped
16 - #reset-cells: must be 1.
20 dw_rst_1: reset-controller@0000 {
21 compatible = "snps,dw-high-reset";
23 #reset-cells = <1>;
26 dw_rst_2: reset-controller@1000 {
27 compatible = "snps,dw-low-reset";
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| /Documentation/devicetree/bindings/display/panel/ |
| D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
24 width-mm:
29 height-mm:
43 non-descriptive information. For instance an LCD panel in a system that
55 panel-timing:
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| /Documentation/devicetree/bindings/regulator/ |
| D | gpio-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/gpio-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Girdwood <lgirdwood@gmail.com>
11 - Mark Brown <broonie@kernel.org>
18 - $ref: regulator.yaml#
22 const: regulator-gpio
24 regulator-name: true
26 enable-gpios:
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| /Documentation/devicetree/bindings/iio/chemical/ |
| D | ams,ccs811.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Narcisa Vasile <narcisaanamaria12@gmail.com>
13 Ultra-Low Power Digital Gas Sensor for Monitoring Indoor Air Quality.
18 - ams,ccs811
22 reset-gpios:
23 description: GPIO connected to the nRESET line. This is an active low
27 wakeup-gpios:
28 description: GPIO connected to the nWAKE line. This is an active low
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| /Documentation/devicetree/bindings/leds/irled/ |
| D | ir-spi-led.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/irled/ir-spi-led.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Young <sean@mess.org>
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 const: ir-spi-led
26 duty-cycle:
30 Percentage of one period in which the signal is active.
32 led-active-low:
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adi,max31827.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices MAX31827, MAX31828, MAX31829 Low-Power Temperature Switch
10 - Daniel Matyas <daniel.matyas@analog.com>
13 Analog Devices MAX31827, MAX31828, MAX31829 Low-Power Temperature Switch with
15 https://www.analog.com/media/en/technical-documentation/data-sheets/MAX31827-MAX31829.pdf
20 - const: adi,max31827
21 - items:
22 - enum:
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