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| /Documentation/devicetree/bindings/power/supply/ |
| D | active-semi,act8945a-charger.yaml | 4 $id: http://devicetree.org/schemas/power/supply/active-semi,act8945a-charger.yaml#
7 title: Active-semi ACT8945A Charger Function
17 const: active-semi,act8945a-charger
22 active-semi,chglev-gpios:
26 active-semi,lbo-gpios:
30 active-semi,input-voltage-threshold-microvolt:
37 active-semi,precondition-timeout:
45 active-semi,total-timeout:
56 - active-semi,chglev-gpios
57 - active-semi,lbo-gpios
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| D | maxim,max8903.yaml | 21 description: Valid DC power has been detected (active low, input)
25 description: Valid USB power has been detected (active low, input)
29 description: Charge enable pin (active low, output)
33 description: Charger status pin (active low, input)
37 description: Fault pin (active low, input)
45 description: USB suspend pin (active high, output)
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | tvp7002.txt | 10 - hsync-active: HSYNC Polarity configuration for the bus. Default value when
13 - vsync-active: VSYNC Polarity configuration for the bus. Default value when
19 - sync-on-green-active: Active state of Sync-on-green signal property of the
21 0 = Normal Operation (Active Low, Default)
24 - field-even-active: Active-high Field ID output polarity control of the bus.
27 0 = Normal Operation (Active Low, Default)
44 hsync-active = <1>;
45 vsync-active = <1>;
47 sync-on-green-active = <1>;
48 field-even-active = <0>;
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| D | ov7670.txt | 13 - hsync-active: active state of the HSYNC signal, 0/1 for LOW/HIGH respectively.
14 - vsync-active: active state of the VSYNC signal, 0/1 for LOW/HIGH respectively.
18 Active is low.
20 Active is high.
48 hsync-active = <0>;
49 vsync-active = <0>;
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| D | galaxycore,gc0308.yaml | 59 hsync-active: true
60 vsync-active: true
61 data-active: true
99 hsync-active = <1>; /* active high */
100 vsync-active = <1>; /* active high */
101 data-active = <1>; /* active high */
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| D | ovti,ov772x.yaml | 31 Reference to the GPIO connected to the RSTB pin which is active low.
36 Reference to the GPIO connected to the PWDN pin which is active high.
61 hsync-active:
65 vsync-active:
80 hsync-active: false
81 vsync-active: false
123 vsync-active = <0>;
124 hsync-active = <0>;
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| D | tda1997x.txt | 52 - hsync-active: Horizontal synchronization polarity. Defaults to active high.
53 - vsync-active: Vertical synchronization polarity. Defaults to active high.
54 - data-active: Data polarity. Defaults to active high.
93 hsync-active = <1>;
94 vsync-active = <1>;
95 data-active = <1>;
135 hsync-active = <1>;
136 vsync-active = <1>;
137 data-active = <1>;
173 hsync-active = <1>;
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| D | tvp514x.txt | 17 - hsync-active: HSYNC Polarity configuration for endpoint.
19 - vsync-active: VSYNC Polarity configuration for endpoint.
37 hsync-active = <1>;
38 vsync-active = <1>;
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| /Documentation/devicetree/bindings/leds/ |
| D | leds-bcm6358.txt | 18 - brcm,clk-dat-low : Boolean, makes clock and data signals active low.
43 active-low;
48 active-low;
53 active-low;
58 active-low;
74 active-low;
79 active-low;
89 active-low;
98 active-low;
103 active-low;
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| /Documentation/devicetree/bindings/media/ |
| D | allwinner,sun4i-a10-csi.yaml | 83 data-active: true
84 hsync-active: true
86 vsync-active: true
90 - data-active
91 - hsync-active
93 - vsync-active
121 hsync-active = <1>; /* Active high */
122 vsync-active = <0>; /* Active low */
123 data-active = <1>; /* Active high */
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| D | allwinner,sun6i-a31-csi.yaml | 57 hsync-active: true
58 vsync-active: true
132 * If hsync-active/vsync-active are missing,
135 hsync-active = <0>; /* Active low */
136 vsync-active = <0>; /* Active low */
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| D | marvell,mmp2-ccic.yaml | 39 hsync-active: true
40 vsync-active: true
88 hsync-active = <1>; /* Active high */
89 vsync-active = <1>; /* Active high */
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| D | atmel-isi.txt | 21 - hsync-active (default: active high)
22 - vsync-active (default: active high)
40 vsync-active = <1>;
41 hsync-active = <1>;
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| D | renesas,ceu.yaml | 46 hsync-active: true
47 vsync-active: true
48 field-even-active: false
78 hsync-active = <1>;
79 vsync-active = <0>;
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| D | pxa-camera.txt | 37 hsync-active = <0>; /* Active low */
38 vsync-active = <0>; /* Active low */
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| /Documentation/devicetree/bindings/mfd/ |
| D | act8945a.txt | 1 Device-Tree bindings for Active-semi ACT8945A MFD driver
4 - compatible: "active-semi,act8945a".
13 compatible = "active-semi,act8945a";
16 active-semi,vsel-high;
70 compatible = "active-semi,act8945a-charger";
76 active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>;
77 active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>;
78 active-semi,input-voltage-threshold-microvolt = <6600>;
79 active-semi,precondition-timeout = <40>;
80 active-semi,total-timeout = <3>;
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| /Documentation/devicetree/bindings/regulator/ |
| D | active-semi,act8945a.yaml | 4 $id: http://devicetree.org/schemas/regulator/active-semi,act8945a.yaml#
7 title: Active-semi ACT8945a regulator
14 const: active-semi,act8945a
25 active-semi,vsel-high:
88 const: active-semi,act8945a-charger
93 active-semi,chglev-gpios:
97 active-semi,lbo-gpios:
101 active-semi,input-voltage-threshold-microvolt:
105 active-semi,precondition-timeout:
109 active-semi,total-timeout:
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| D | ti,tps65132.yaml | 42 active-discharge-gpios:
47 ti,active-discharge-time-us:
48 description: Regulator active discharge time in microseconds.
51 active-discharge-gpios: [ 'ti,active-discharge-time-us' ]
83 regulator-active-discharge = <0>;
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| D | active-semi,act8865.yaml | 4 $id: http://devicetree.org/schemas/regulator/active-semi,act8865.yaml#
7 title: Active-semi ACT8865 regulator
14 const: active-semi,act8865
25 active-semi,vsel-high:
91 #include <dt-bindings/regulator/active-semi,8865-regulator.h>
98 compatible = "active-semi,act8865";
100 active-semi,vsel-high;
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| /Documentation/devicetree/bindings/power/reset/ |
| D | gpio-restart.yaml | 21 is configured as an output, and driven active, triggering a level triggered reset condition.
22 This will also cause an inactive->active edge condition, triggering positive edge triggered
23 reset. After a delay specified by active-delay, the GPIO is set to inactive, thus causing an
24 active->inactive edge, triggering negative edge triggered reset. After a delay specified by
25 inactive-delay, the GPIO is driven active again. After a delay specified by wait-delay, the
38 set it to "Active Low", otherwise set GPIO to "Active High".
49 active-delay:
51 description: Delay (default 100) to wait after driving gpio active [ms]
76 active-delay = <100>;
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| D | gpio-poweroff.yaml | 15 from inactive to active. After a delay (active-delay-ms) it
17 delay (inactive-delay-ms) it is configured as active again.
38 active-delay-ms:
40 description: Delay to wait after driving gpio active
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| /Documentation/devicetree/bindings/bus/ |
| D | nvidia,tegra20-gmi.txt | 34 child device is supported which represents the active chip-select line, see
45 - nvidia,snor-rdy-active-before-data: Assert RDY signal one cycle before data.
47 - nvidia,snor-rdy-active-high: RDY signal is active high
48 - nvidia,snor-adv-active-high: ADV signal is active high
49 - nvidia,snor-oe-active-high: WE/OE signal is active high
50 - nvidia,snor-cs-active-high: CS signal is active high
94 nvidia,snor-adv-active-high;
125 nvidia,snor-adv-active-high;
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| /Documentation/hwmon/ |
| D | ds620.rst | 31 output pin PO becomes active when the temperature falls below temp1_min and
32 stays active until the temperature goes above temp1_max.
35 output pin becomes active when the temperature goes above temp1_max and stays
36 active until the temperature falls below temp1_min.
38 The PO output pin of the DS620 operates active-low.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-max77620.txt | 46 - maxim,active-fps-source: FPS source for the GPIOs to get
48 active state. Valid values are:
64 - maxim,active-fps-power-up-slot: Sequencing event slot number on which
71 - maxim,active-fps-power-down-slot: Sequencing event slot number on which
79 "maxim,active-fps-source" but value
84 "maxim,active-fps-power-up-slot" but
92 "maxim,active-fps-power-down-slot" but
118 maxim,active-fps-source = <MAX77620_FPS_SRC_0>;
124 maxim,active-fps-source = <MAX77620_FPS_SRC_1>;
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| /Documentation/firmware-guide/acpi/ |
| D | gpio-properties.rst | 55 active low or high, the "active_low" argument can be used here. Setting
56 it to 1 marks the GPIO as active low.
83 | +-------------+ as high, assuming non-active |
86 | | High | as high, assuming active |
89 | +-------------+ as low, assuming non-active |
92 | | Low | as low, assuming active |
96 is explicit and _DSD is present, will be treated as active with a high
118 Active High. Even for the cases when _DSD() is involved (see the example
119 above) the GPIO CS polarity must be defined Active High to avoid ambiguity.
190 line 0: "pin_0" unused input active-high
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