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/Documentation/devicetree/bindings/leds/
Dleds-netxbig.txt5 - compatible: "lacie,netxbig-leds".
6 - gpio-ext: Phandle for the gpio-ext bus.
9 - timers: Timer array. Each timer entry is represented by three integers:
10 Mode (gpio-ext bus), delay_on and delay_off.
12 Each LED is represented as a sub-node of the netxbig-leds device.
14 Required sub-node properties:
15 - mode-addr: Mode register address on gpio-ext bus.
16 - mode-val: Mode to value mapping. Each entry is represented by two integers:
17 A mode and the corresponding value on the gpio-ext bus.
18 - bright-addr: Brightness register address on gpio-ext bus.
[all …]
/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5200.txt2 ----------------------------
4 (c) 2006-2009 Secret Lab Technologies Ltd
8 ------------------
9 For mpc5200 on-chip devices, the format for each compatible value is
10 <chip>-<device>[-<mode>]. The OS should be able to match a device driver
21 "fsl,mpc5200-<device>".
26 devices have extra functions but still have a backwards compatible mode.
29 compatible = "fsl,mpc5200b-<device>","fsl,mpc5200-<device>";
34 ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec";
35 ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec";
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/Documentation/netlink/specs/
Dnfsd.yaml1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
5 uapi-header: linux/nfsd_netlink.h
9 attribute-sets:
10 -
11 name: rpc-status
13 -
16 byte-order: big-endian
17 -
20 -
23 -
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/Documentation/virt/kvm/devices/
Ds390_flic.rst1 .. SPDX-License-Identifier: GPL-2.0
7 FLIC handles floating (non per-cpu) interrupts, i.e. I/O, service and some
8 machine check interruptions. All interrupts are stored in a per-vm list of
14 - add interrupts (KVM_DEV_FLIC_ENQUEUE)
15 - inspect currently pending interrupts (KVM_FLIC_GET_ALL_IRQS)
16 - purge all pending floating interrupts (KVM_DEV_FLIC_CLEAR_IRQS)
17 - purge one pending floating I/O interrupt (KVM_DEV_FLIC_CLEAR_IO_IRQ)
18 - enable/disable for the guest transparent async page faults
19 - register and modify adapter interrupt sources (KVM_DEV_FLIC_ADAPTER_*)
20 - modify AIS (adapter-interruption-suppression) mode state (KVM_DEV_FLIC_AISM)
[all …]
Dxive.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - KVM_DEV_TYPE_XIVE POWER9 XIVE Interrupt Controller generation 1
16 XIVE native exploitation interrupt mode. If not, it should run using
17 the legacy interrupt mode, referred as XICS (POWER7/8).
32 - Interrupt Pending Buffer (IPB)
33 - Current Processor Priority (CPPR)
34 - Notification Source Register (NSR)
49 3. Device pass-through
51 When a device is passed-through into the guest, the source
61 interrupt of the device being passed-through or the initial IPI ESB
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/Documentation/devicetree/bindings/mtd/
Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/Documentation/networking/
Dipvlan.rst1 .. SPDX-License-Identifier: GPL-2.0
13 exception of using L3 for mux-ing /demux-ing among slaves. This property makes
34 ip link add link <master> name <slave> type ipvlan [ mode MODE ] [ FLAGS ]
36 MODE: l3 (default) | l3s | l2
42 L3 bridge mode::
45 (b) This command will create IPvlan link in L2 bridge mode::
47 bash# ip link add link eth0 name ipvl0 type ipvlan mode l2 bridge
49 (c) This command will create an IPvlan device in L2 private mode::
51 bash# ip link add link eth0 name ipvlan type ipvlan mode l2 private
53 (d) This command will create an IPvlan device in L2 vepa mode::
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Dphonet.rst1 .. SPDX-License-Identifier: GPL-2.0
9 ------------
19 - USB with the CDC Phonet interface,
20 - infrared,
21 - Bluetooth,
22 - an RS232 serial port (with a dedicated "FBUS" line discipline),
23 - the SSI bus with some TI OMAP processors.
27 --------------
32 uint8_t pn_media; /* Media type (link-layer identifier) */
36 uint16_t pn_length; /* Big-endian message byte length (minus 6) */
[all …]
Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
37 one of the rings references a frame by referencing its addr. The addr
43 FILL ring is used by the application to send down addr for the kernel
46 COMPLETION ring, on the other hand, contains frame addr that the
62 then receive frame addr references in its own RX ring that point to
64 single-consumer / single-producer (for performance reasons), the new
72 user-space application can place an XSK at an arbitrary place in this
83 when loading the XDP program, XDP_SKB mode is employed that uses SKBs
85 space. A fallback mode that works for any network device. On the other
[all …]
Dxsk-tx-metadata.rst1 .. SPDX-License-Identifier: GPL-2.0
8 via :doc:`af_xdp`. Refer to :doc:`xdp-rx-metadata` on how to access similar
26 ``xdp_desc->addr`` in the umem frame. Within a frame, the metadata
31 +-----------------+---------+----------------------------+
33 +-----------------+---------+----------------------------+
36 xdp_desc->addr
40 use ``xdp_desc->addr - tx_metadata_len`` to locate
47 - ``XDP_TXMD_FLAGS_TIMESTAMP``: requests the device to put transmission
49 - ``XDP_TXMD_FLAGS_CHECKSUM``: requests the device to calculate L4
56 bit in the ``options`` field. Also note that in a multi-buffer packet
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/Documentation/devicetree/bindings/eeprom/
Dat25.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christian Eggers <ceggers@arri.de>
15 - pattern: "^eeprom@[0-9a-f]{1,2}$"
16 - pattern: "^fram@[0-9a-f]{1,2}$"
26 - items:
27 - enum:
28 - anvo,anv32e61w
29 - atmel,at25256B
[all …]
/Documentation/userspace-api/media/cec/
Dcec-ioc-adap-g-log-addrs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
15 CEC_ADAP_G_LOG_ADDRS, CEC_ADAP_S_LOG_ADDRS - Get or set the logical addresses
49 can only be called by a file descriptor in initiator mode (see :ref:`CEC_S_MODE`), if not
59 addresses have been claimed. If the file descriptor is in non-blocking mode then it will
62 A :ref:`CEC_EVENT_STATE_CHANGE <CEC-EVENT-STATE-CHANGE>` event is sent when the
74 .. flat-table:: struct cec_log_addrs
75 :header-rows: 0
76 :stub-columns: 0
79 * - __u8
80 - ``log_addr[CEC_MAX_LOG_ADDRS]``
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Dcec-funcs.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _cec-user-func:
13 cec-func-open
14 cec-func-close
15 cec-func-ioctl
16 cec-func-poll
17 cec-ioc-adap-g-caps
18 cec-ioc-adap-g-log-addrs
19 cec-ioc-adap-g-phys-addr
20 cec-ioc-adap-g-conn-info
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/Documentation/arch/powerpc/
Dptrace.rst9 2 hardware watchpoints (read, write and read-write) (DAC)
15 that GDB doesn't need to special-case each of them. We added the
24 an 8-byte alignment restriction for hardware watchpoints. We'd like to avoid
65 uint32_t addr_mode; /* address match mode */
77 uint64_t addr;
92 request to ask for its removal. Return -ENOSPC if the requested breakpoint
97 - set a breakpoint in the first breakpoint register::
103 p.addr = (uint64_t) address;
107 - set a watchpoint which triggers on reads in the second watchpoint register::
113 p.addr = (uint64_t) address;
[all …]
/Documentation/ABI/testing/
Dsysfs-class-rnbd-client1 What: /sys/class/rnbd-client
5 Description: Provide information about RNBD-client.
6 All sysfs files that are not read-only provide the usage information on read:
10 # cat /sys/class/rnbd-client/ctl/map_device
16 > addr ::= [ ip:<ipv4> | ip:<ipv6> | gid:<gid> ]
18 What: /sys/class/rnbd-client/ctl/map_device
34 I.e. "clt_hostname-srv_hostname" could be a natural choice.
49 The single addr is treated as the destination.
56 First addr is the source address and the second is the destination.
70 directory and an entry in /sys/class/rnbd-client/ctl/devices
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/Documentation/devicetree/bindings/leds/backlight/
Dlp855x-backlight.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/backlight/lp855x-backlight.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Artur Weber <aweber.kernel@gmail.com>
15 - ti,lp8550
16 - ti,lp8551
17 - ti,lp8552
18 - ti,lp8553
19 - ti,lp8555
[all …]
/Documentation/devicetree/bindings/i2c/
Dbrcm,iproc-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
15 - brcm,iproc-i2c
16 - brcm,iproc-nic-i2c
21 clock-frequency:
29 to polling mode
32 brcm,ape-hsls-addr-mask:
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/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
23 compatible = "ifm,o2d-csi";
[all …]
/Documentation/i2c/
Dsmbus-protocol.rst40 read mode.
44 Addr (7 bits) I2C 7 bit address. Note that this can be expanded to
62 S Addr Rd/Wr [A] P
77 S Addr Rd [A] [Data] NA P
92 S Addr Wr [A] Data [A] P
105 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [Data] NA P
119 S Addr Wr [A] Comm [A] Sr Addr Rd [A] [DataLow] A [DataHigh] NA P
139 S Addr Wr [A] Comm [A] Data [A] P
153 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
168 S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
[all …]
/Documentation/devicetree/bindings/dma/stm32/
Dst,stm32-mdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-mdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The STM32 MDMA is a general-purpose direct memory access controller capable of
13 described in the dma.txt file, using a five-cell specifier for each channel:
22 -bit 0-1: Source increment mode
26 -bit 2-3: Destination increment mode
30 -bit 8-9: Source increment offset size
32 0x1: half-word (16bit)
[all …]
/Documentation/networking/dsa/
Db53.rst1 .. SPDX-License-Identifier: GPL-2.0
20 The switch is, if possible, configured to enable a Broadcom specific 4-bytes
30 configuration described in the :ref:`dsa-config-showcases`.
33 ----------------------------------
38 See :ref:`dsa-tagged-configuration`.
41 -------------------------------------
44 yet. 539x and 531x5 require managed mode and some special handling, which is
48 The configuration slightly differ from the :ref:`dsa-vlan-configuration`.
54 In difference to the configuration described in :ref:`dsa-vlan-configuration`
64 .. code-block:: sh
[all …]
Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
42 - when a DSA user interface is brought up, the conduit interface is
44 - when the conduit interface is brought down, all DSA user interfaces are
71 * lan1: 192.0.2.1/30 (192.0.2.0 - 192.0.2.3)
72 * lan2: 192.0.2.5/30 (192.0.2.4 - 192.0.2.7)
73 * lan3: 192.0.2.9/30 (192.0.2.8 - 192.0.2.11)
76 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
79 * br0: 192.0.2.129/25 (192.0.2.128 - 192.0.2.255)
[all …]
/Documentation/devicetree/bindings/net/
Dmarvell-orion-net.txt12 set of controller registers. Each port node describes port-specific properties.
16 only one port associated. Multiple ports are implemented as multiple single-port
23 - #address-cells: shall be 1.
24 - #size-cells: shall be 0.
25 - compatible: shall be one of "marvell,orion-eth", "marvell,kirkwood-eth".
26 - reg: address and length of the controller registers.
29 - clocks: phandle reference to the controller clock.
30 - marvell,tx-checksum-limit: max tx packet size for hardware checksum.
35 - compatible: shall be one of "marvell,orion-eth-port",
36 "marvell,kirkwood-eth-port".
[all …]
/Documentation/PCI/endpoint/
Dpci-endpoint.rst1 .. SPDX-License-Identifier: GPL-2.0
13 operates in Root Complex mode. The subsystem has capability to scan PCI bus,
15 vendor ID, device ID), support other services like hot-plug, power management,
19 either in Root Complex mode or Endpoint mode. PCI Endpoint Framework will
20 add endpoint mode support in Linux. This will help to run Linux in an
22 validation, co-processor accelerator, etc.
32 ------------------------------------
35 in endpoint mode. It also provides APIs to be used by function driver/library
53 * raise_irq: ops to raise a legacy, MSI or MSI-X interrupt
74 Initialize the pci_epc_mem structure used for allocating EPC addr space.
[all …]
/Documentation/arch/arm64/
Dmemory-tagging-extension.rst8 Date: 2020-02-25
18 (Top Byte Ignore) feature and allows software to access a 4-bit
19 allocation tag for each 16-byte granule in the physical address space.
20 Such memory range must be mapped with the Normal-Tagged memory
21 attribute. A logical tag is derived from bits 59-56 of the virtual
34 --------
40 ``PROT_MTE`` - Pages allow access to the MTE allocation tags.
43 user address space and preserved on copy-on-write. ``MAP_SHARED`` is
47 RAM-based file mappings (``tmpfs``, ``memfd``). Passing it to other
48 types of mapping will result in ``-EINVAL`` returned by these system
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