| /Documentation/filesystems/ |
| D | qnx6.rst | 56 data and the addressing levels in that specific tree.
60 Level 1 adds an additional indirect addressing level where each indirect
61 addressing block holds up to blocksize / 4 bytes pointers to data blocks.
62 Level 2 adds an additional indirect addressing block level (so, already up
66 indirect addressing blocks or inodes.
97 For more than 16 blocks an indirect addressing in form of another tree is
143 Long filenames are stored in a separate addressing tree. The staring point
165 smaller than addressing space in the bitmap.
183 Bitmap blocks, Inode blocks and indirect addressing blocks for those two
|
| /Documentation/networking/ |
| D | iso15765-2.rst | 26 Addressing section in Overview
29 In its simplest form, ISO-TP is based on two kinds of addressing modes for the
32 * physical addressing is implemented by two node-specific addresses and is used
35 * functional addressing is implemented by one node-specific address and is used
38 Three different addressing formats can be employed:
55 is generating and the optional extended addressing. In the first case, the data
163 additional address component. This enables the "mixed" addressing format if
164 used alone, or the "extended" addressing format if used in conjunction with
191 as extended addressing byte on the reception path. If used in conjunction
193 addressing format.
[all …]
|
| D | j1939.rst | 11 sophisticated addressing scheme and extends the maximum packet size above 8
32 addressing and transport methods used by J1939.
34 * **Addressing:** when a process on an ECU communicates via J1939, it should
42 * **Dynamic addressing:** Address Claiming in J1939 is time critical.
46 results in a consistent J1939 bus with proper addressing.
132 Addressing section in J1939 concepts
135 Both static and dynamic addressing methods can be used.
141 For dynamic addressing, so-called Address Claiming, extra support is foreseen
341 Dynamic Addressing
423 Static Addressing
|
| D | tipc.rst | 32 - Service Addressing
34 A fundamental concept in TIPC is that of Service Addressing which makes it
|
| D | ila.rst | 4 Identifier Locator Addressing (ILA)
11 Identifier-locator addressing (ILA) is a technique used with IPv6 that
15 addressing can be used to efficiently implement overlay networks for
|
| /Documentation/driver-api/serial/ |
| D | serial-rs485.rst | 107 5. Multipoint Addressing
110 The Linux kernel provides addressing mode for multipoint RS-485 serial
111 communications line. The addressing mode is enabled with
117 - ``SER_RS485_ADDRB``: Enabled addressing mode (sets also ADDRB in termios).
130 Note: not all devices supporting RS485 support multipoint addressing.
|
| /Documentation/scsi/ |
| D | aha152x.rst | 126 The BIOS uses a cylinder/head/sector addressing scheme (C/H/S)
128 C/H/S addressing.
131 as base for requests in C/H/S addressing. SCSI only knows about the
135 geometry just to be able to support that addressing scheme. The geometry
141 instead of C/H/S addressing. Unfortunately C/H/S addressing is also used
145 Moreover there are certain limitations to the C/H/S addressing scheme,
|
| D | ChangeLog.sym53c8xx_2 | 105 - Add infrastructure for the forthcoming 64 bit DMA addressing support.
111 - Add support for 64 bit DMA addressing using segment registers.
|
| /Documentation/arch/x86/x86_64/ |
| D | fsgs.rst | 7 memory can use segment register based addressing mode. The following
38 applications. GCC and Clang support GS based addressing via address space
85 more flexible usage of the FS/GS addressing modes in user space
141 Compiler support for FS/GS based addressing
144 GCC version 6 and newer provide support for FS/GS based addressing via
189 FS/GS based addressing with inline assembly
193 be used for FS/GS based addressing mode::
|
| /Documentation/devicetree/bindings/mtd/ |
| D | jedec,spi-nor.yaml | 69 Some flash devices utilize stateful addressing modes (e.g., for 32-bit
70 addressing) which need to be managed carefully by a system. Because these
|
| /Documentation/networking/device_drivers/ethernet/google/ |
| D | gve.rst | 55 Addressing Mode
57 GVE supports two addressing modes: QPL and RDA.
61 For RDA ("raw DMA addressing") mode, the set of pages is dynamic.
|
| /Documentation/hwmon/ |
| D | abituguru-datasheet.rst | 56 Addressing section in Reading / Writing
59 The uGuru has a number of different addressing levels. The first addressing
71 terminology for the addressing within a bank this is not 100% correct, in
72 bank 0x24 for example the addressing within the bank selects a PWM output not
|
| /Documentation/core-api/ |
| D | dma-api-howto.rst | 149 DMA addressing capabilities
153 addressing. For a 64-bit capable device, this needs to be increased, and for
157 64-bit addressing (DAC) for all transactions. And at least one platform (SGI
162 your devices DMA addressing capabilities.
206 The 24-bit addressing device would do something like this::
213 The standard 64-bit addressing device would do something like this::
233 If the device only supports 32-bit addressing for descriptors in the
251 dev_warn(dev, "mydev: 24-bit DMA addressing not available\n");
263 DMA addressing limitations, you may wish to probe each mask and
294 and thus retaining the 16MB DMA addressing limitations of ISA.
|
| D | memory-allocation.rst | 68 userspace but has no addressing limitations.
83 with limited addressing capabilities. So unless you are writing a
|
| /Documentation/devicetree/bindings/mailbox/ |
| D | qcom-ipcc.yaml | 15 addressing scheme called protocol, client and signal. For example, consider an
|
| /Documentation/devicetree/bindings/display/ |
| D | dsi-controller.yaml | 59 from 0 to 3, as DSI uses a 2-bit addressing scheme. Some DSI
|
| /Documentation/admin-guide/hw-vuln/ |
| D | srso.rst | 88 extended IBPB microcode patch functionality by addressing
102 Mitigation addressing the cloud provider scenario - the Guest->Host
|
| /Documentation/arch/x86/ |
| D | sva.rst | 4 Shared Virtual Addressing (SVA) with ENQCMD
10 Shared Virtual Addressing (SVA) allows the processor and device to use the
172 Shared Virtual Addressing (SVA) permits I/O hardware and the processor to
|
| /Documentation/driver-api/media/ |
| D | maintainer-entry-profile.rst | 160 may question about the rationale for not addressing the ``checkpatch.pl``.
166 Note that addressing one ``checkpatch.pl`` issue (of any kind) alone may lead
|
| /Documentation/arch/arm/ |
| D | memory.rst | 13 The ARM CPU is capable of addressing a maximum of 4GB virtual memory
|
| /Documentation/tee/ |
| D | ts-tee.rst | 24 an "interface ID". This is just a short ID to simplify message addressing.
|
| /Documentation/misc-devices/ |
| D | uacce.rst | 7 provide Shared Virtual Addressing (SVA) between accelerators and processes.
|
| /Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 26 - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits).
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | imi,rdacm2x-gmsl.yaml | 23 accessible by the host SoC by direct addressing.
|
| /Documentation/devicetree/bindings/i3c/ |
| D | i3c.yaml | 86 I2C address. 10 bit addressing is not supported. Devices with
|