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/Documentation/devicetree/bindings/serial/
Dpl011.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM AMBA Primecell PL011 serial UART
10 - Rob Herring <robh@kernel.org>
13 - $ref: /schemas/arm/primecell.yaml#
14 - $ref: serial.yaml#
16 # Need a custom select here or 'arm,primecell' will match on lots of nodes
22 - arm,pl011
24 - compatible
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Dsamsung_uart.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
15 node, according to serialN format, where N is the port number (non-negative
21 - enum:
22 - apple,s5l-uart
23 - axis,artpec8-uart
24 - google,gs101-uart
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/Documentation/devicetree/bindings/arm/
Dapple.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/apple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple ARM Machine
10 - Hector Martin <marcan@marcan.st>
13 ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".
17 - Mac mini (M1, 2020)
18 - MacBook Pro (13-inch, M1, 2020)
19 - MacBook Air (M1, 2020)
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Darm,coresight-cti.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
5 $id: http://devicetree.org/schemas/arm/arm,coresight-cti.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ARM Coresight Cross Trigger Interface (CTI) device.
31 are implementation defined, except when the CTI is connected to an ARM v8
34 In this case the ARM v8 architecture defines the required signal connections
37 indicate this feature (arm,coresight-cti-v8-arch).
52 constants defined in <dt-bindings/arm/coresight-cti-dt.h>
59 Note that some hardware trigger signals can be connected to non-CoreSight
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/Documentation/devicetree/bindings/perf/
Darm,coresight-pmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/perf/arm,coresight-pmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm Coresight Performance Monitoring Unit Architecture
10 - Robin Murphy <robin.murphy@arm.com>
14 const: arm,coresight-pmu
18 - description: Register page 0
19 - description: Register page 1, if the PMU implements the dual-page extension
24 - description: Overflow interrupt
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/Documentation/devicetree/bindings/iio/adc/
Dfsl,imx7d-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
14 const: fsl,imx7d-adc
25 clock-names:
28 vref-supply: true
30 "#io-channel-cells":
34 - compatible
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Dbrcm,iproc-static-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/brcm,iproc-static-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Raveendra Padasalagi <raveendra.padasalagi@broadcom.com>
17 const: brcm,iproc-static-adc
19 adc-syscon:
25 "#io-channel-cells":
31 clock-names:
40 - compatible
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Drockchip-saradc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/rockchip-saradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - const: rockchip,saradc
16 - const: rockchip,rk3066-tsadc
17 - const: rockchip,rk3399-saradc
18 - const: rockchip,rk3588-saradc
19 - items:
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Dnxp,imx8qxp-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx8qxp-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cai Huoqing <caihuoqing@baidu.com>
17 const: nxp,imx8qxp-adc
28 clock-names:
30 - const: per
31 - const: ipg
33 assigned-clocks:
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Dnxp,imx93-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Haibo Chen <haibo.chen@nxp.com>
13 The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
15 One-Shot and Scan (continuous) conversions. Programmable DMA
18 also has Self-test logic and Software-initiated calibration.
22 const: nxp,imx93-adc
29 - description: WDGnL, watchdog threshold interrupt requests.
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Damlogic,meson-saradc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
18 - const: amlogic,meson-saradc
19 - items:
20 - enum:
21 - amlogic,meson8-saradc
22 - amlogic,meson8b-saradc
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Dst,stm32-dfsdm-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-dfsdm-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Olivier Moysan <olivier.moysan@foss.st.com>
14 STM32 DFSDM ADC is a sigma delta analog-to-digital converter dedicated to
17 - Sigma delta modulators (motor control, metering...)
18 - PDM microphones (audio digital microphone)
28 - st,stm32h7-dfsdm
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Dnuvoton,npcm750-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tomer Maimon <tmaimon77@gmail.com>
13 The NPCM7XX ADC is a 10-bit converter and NPCM8XX ADC is a 12-bit converter,
19 - nuvoton,npcm750-adc
20 - nuvoton,npcm845-adc
36 vref-supply:
39 "#io-channel-cells":
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/Documentation/devicetree/bindings/net/
Dsmsc,lan91c111.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Smart Mixed-Signal Connectivity (SMSC) LAN91C9x/91C1xx Controller
10 - Nicolas Pitre <nico@fluxnic.net>
13 - $ref: ethernet-controller.yaml#
25 reg-shift: true
27 reg-io-width:
31 reset-gpios:
35 power-gpios:
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/Documentation/arch/arm/
Dporting.rst5 Taken from list archive at http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2001-July/00406…
8 -------------------
14 phys = virt - PAGE_OFFSET + PHYS_OFFSET
18 --------------------
25 to be located in RAM, it can be in flash or other read-only or
26 read-write addressable medium.
29 Start address of zero-initialised work area for the decompressor.
59 --------------
83 (In other words, you can't put IO mappings below TASK_SIZE, and
110 ----------------------------
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/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
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/Documentation/devicetree/bindings/thermal/
Dqcom,spmi-temp-alarm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/thermal/qcom,spmi-temp-alarm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
18 - $ref: thermal-sensor.yaml#
22 const: qcom,spmi-temp-alarm
30 io-channels:
32 - description: ADC channel, which reports chip die temperature
34 io-channel-names:
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/Documentation/devicetree/bindings/pci/
Dhost-generic-pci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/host-generic-pci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <will@kernel.org>
13 Firmware-initialised PCI host controllers and PCI emulations, such as the
14 virtio-pci implementations found in kvmtool and other para-virtualised
18 presenting a set of fixed windows describing a subset of IO, Memory and
21 Configuration Space is assumed to be memory-mapped (as opposed to being
26 For CAM, this 24-bit offset is:
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/Documentation/devicetree/bindings/sram/
Dsram.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
13 Simple IO memory regions to be managed by the genalloc API.
19 Following the generic-names recommended practice, node names should
30 - mmio-sram
31 - amlogic,meson-gxbb-sram
32 - arm,juno-sram-ns
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/Documentation/devicetree/bindings/display/
Dallwinner,sun8i-a83t-dw-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 in bridge/synopsys,dw-hdmi.yaml with the following device-specific
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
23 "#phy-cells":
28 - const: allwinner,sun8i-a83t-dw-hdmi
29 - const: allwinner,sun50i-h6-dw-hdmi
[all …]
/Documentation/devicetree/bindings/net/can/
Dnxp,sja1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wolfgang Grandegger <wg@grandegger.com>
15 - enum:
16 - nxp,sja1000
17 - technologic,sja1000
18 - items:
19 - enum:
20 - renesas,r9a06g032-sja1000 # RZ/N1D
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/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,nsp.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/bcm/brcm,nsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 applications. The SoC features dual core Cortex A9 ARM CPUs, integrating
14 DDR3 memory, PCIE Gen-2, USB 2.0 and USB 3.0, serial and NAND flash,
15 SATA and several other IO controllers.
18 - Ray Jui <rjui@broadcom.com>
19 - Scott Branden <sbranden@broadcom.com>
26 - description: BCM58522 based boards
[all …]
/Documentation/devicetree/bindings/ufs/
Dsamsung,exynos-ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alim Akhtar <alim.akhtar@samsung.com>
18 - google,gs101-ufs
19 - samsung,exynos7-ufs
20 - samsung,exynosautov9-ufs
21 - samsung,exynosautov9-ufs-vh
22 - tesla,fsd-ufs
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/Documentation/devicetree/bindings/display/rockchip/
Drockchip,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Yao <markyao0591@gmail.com>
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
18 - $ref: /schemas/sound/dai-common.yaml#
23 - rockchip,rk3228-dw-hdmi
24 - rockchip,rk3288-dw-hdmi
25 - rockchip,rk3328-dw-hdmi
[all …]
/Documentation/networking/device_drivers/ethernet/davicom/
Ddm9000.rst1 .. SPDX-License-Identifier: GPL-2.0
9 Ben Dooks <ben@simtec.co.uk> <ben-linux@fluff.org>
13 ------------
15 This file describes how to use the DM9000 platform-device based network driver
25 ----------------------------
37 An example from arch/arm/mach-s3c/mach-bast.c is::
91 -------------
93 Extra platform data for the DM9000 can describe the IO bus width to the
101 The IO should be done with 8bit operations.
105 The IO should be done with 16bit operations.
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