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/Documentation/devicetree/bindings/arm/
Darm,realview.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,realview.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM RealView Boards
10 - Linus Walleij <linus.walleij@linaro.org>
13 The ARM RealView series of reference designs were built to explore the Arm11,
14 Cortex-A8, and Cortex-A9 CPUs. This included new features compared to the
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
23 as a generic platform to test different FPGA designs, and has
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Darm,integrator.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,integrator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Integrator Boards
10 - Linus Walleij <linus.walleij@linaro.org>
13 These were the first ARM platforms officially supported by ARM Ltd.
14 They are ARMv4, ARMv5 and ARMv6-capable using different core tiles,
23 - description: ARM Integrator Application Platform, this board has a PCI
27 rapid prototyping. See ARM DUI 0098B. This board can physically come
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Dapple.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/apple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple ARM Machine
10 - Hector Martin <marcan@marcan.st>
13 ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon".
17 - Mac mini (M1, 2020)
18 - MacBook Pro (13-inch, M1, 2020)
19 - MacBook Air (M1, 2020)
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Darm,vexpress-juno.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,vexpress-juno.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Versatile Express and Juno Boards
10 - Sudeep Holla <sudeep.holla@arm.com>
11 - Linus Walleij <linus.walleij@linaro.org>
14 ARM's Versatile Express platform were built as reference designs for exploring
15 multicore Cortex-A class systems. The Versatile Express family contains both
30 "arm,vexpress" compatible was retained in the root node, and these are
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Dvexpress-scc.txt1 ARM Versatile Express Serial Configuration Controller
2 -----------------------------------------------------
4 Test chips for ARM Versatile Express platform implement SCC (Serial
11 like platform configuration control and power management.
15 - compatible value: "arm,vexpress-scc,<model>", "arm,vexpress-scc";
18 eg. for Coretile Express A15x2 A7x3 (V2P-CA15_A7):
19 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
23 - reg: when the SCC is memory mapped, physical address and size of the
25 - interrupts: when the SCC can generate a system-level interrupt
30 compatible = "arm,vexpress-scc,v2p-ca15_a7", "arm,vexpress-scc";
Darm,versatile-sysreg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,versatile-sysreg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Arm Versatile system registers
10 - Linus Walleij <linus.walleij@linaro.org>
14 platform functions like board detection and identification, software
20 - const: arm,versatile-sysreg
21 - const: syscon
22 - const: simple-mfd
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Darm,corstone1000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,corstone1000.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Corstone1000
10 - Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
11 - Hugues Kamba Mpiana <hugues.kambampiana@arm.com>
14 ARM's Corstone1000 includes pre-verified Corstone SSE-710 subsystem that
19 systems for M-Class (or other) processors for adding sensors, connectivity,
25 seamless integration of the optional CryptoCell™-312 cryptographic
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Darm,versatile.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,versatile.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Versatile Boards
10 - Linus Walleij <linus.walleij@linaro.org>
13 The ARM Versatile boards are two variants of ARM926EJ-S evaluation boards
30 - description: The ARM Versatile Application Baseboard (HBI-0118) is an
31 evaluation board specifically for the ARM926EJ-S. It can be connected
32 to an IB1 interface board for a touchscreen-type use case or an IB2
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/Documentation/hwmon/
Dvexpress.rst6 * ARM Ltd. Versatile Express platform
15 - http://infocenter.arm.com/help/topic/com.arm.doc.subset.boards.express/index.html
17 * Section "4.4.14. System Configuration registers" of the V2M-P1 TRM:
19 - http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0447-/index.html
24 -----------
26 Versatile Express platform (http://www.arm.com/versatileexpress/) is a
27 reference & prototyping system for ARM Ltd. processors. It can be set up
29 chip/FPGA) a number of microcontrollers responsible for platform
39 As these devices are non-discoverable, they must be described in a Device
/Documentation/arch/arm/sti/
Doverview.rst2 STi ARM Linux Overview
6 ------------
9 CortexA9 System-on-Chip are supported by the 'STi' platform of
10 ARM Linux. Currently STiH407, STiH410 and STiH418 are supported.
14 -------------
16 The configuration for the STi platform is supported via the multi_v7_defconfig.
19 ------
22 are located in the platform code contained in arch/arm/mach-sti
24 There is a generic board board-dt.c in the mach folder which support
30 ---------------
/Documentation/arch/arm/spear/
Doverview.rst2 SPEAr ARM Linux Overview
6 ------------
11 The ST Microelectronics SPEAr range of ARM9/CortexA9 System-on-Chip CPUs are
12 supported by the 'spear' platform of ARM Linux. Currently SPEAr1310,
17 SPEAr (Platform)
19 - SPEAr3XX (3XX SOC series, based on ARM9)
20 - SPEAr300 (SOC)
21 - SPEAr300 Evaluation Board
22 - SPEAr310 (SOC)
23 - SPEAr310 Evaluation Board
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/Documentation/arch/arm/stm32/
Doverview.rst2 STM32 ARM Linux Overview
6 ------------
8 The STMicroelectronics STM32 family of Cortex-A microprocessors (MPUs) and
9 Cortex-M microcontrollers (MCUs) are supported by the 'STM32' platform of
10 ARM Linux.
13 -------------
21 ------
23 All the files for multiple machine families are located in the platform code
24 contained in arch/arm/mach-stm32
26 There is a generic board board-dt.c in the mach folder which support
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/Documentation/devicetree/bindings/firmware/
Darm,scmi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2021 ARM Ltd.
4 ---
5 $id: http://devicetree.org/schemas/firmware/arm,scmi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
15 that are provided by the hardware platform it is running on, including power
19 the SCMI as described in ARM document number ARM DEN 0056 ("ARM System Control
20 and Management Interface Platform Design Document")[0] provide for OSPM in
23 [0] https://developer.arm.com/documentation/den0056/latest
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/Documentation/process/
Dmaintainer-soc.rst1 .. SPDX-License-Identifier: GPL-2.0
8 --------
10 The SoC subsystem is a place of aggregation for SoC-specific code.
13 * devicetrees for 32- & 64-bit ARM and RISC-V
14 * 32-bit ARM board files (arch/arm/mach*)
15 * 32- & 64-bit ARM defconfigs
16 * SoC-specific drivers across architectures, in particular for 32- & 64-bit
17 ARM, RISC-V and Loongarch
19 These "SoC-specific drivers" do not include clock, GPIO etc drivers that have
20 other top-level maintainers. The drivers/soc/ directory is generally meant
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/Documentation/devicetree/bindings/bus/
Darm,integrator-ap-lm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/arm,integrator-ap-lm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linusw@kernel.org>
12 description: The Integrator/AP is a prototyping platform and as such has a
14 use with this platform. A special system controller register can be read to
17 then have their own specific per-module bindings and they will be described
21 "#address-cells":
24 "#size-cells":
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/Documentation/devicetree/bindings/timer/
Darm,mps2-timer.txt1 ARM MPS2 timer
3 The MPS2 platform has simple general-purpose 32 bits timers.
6 - compatible : Should be "arm,mps2-timer"
7 - reg : Address and length of the register set
8 - interrupts : Reference to the timer interrupt
11 - clocks : The input clock of the timer
12 - clock-frequency : The rate in HZ in input of the ARM MPS2 timer
16 timer1: mps2-timer@40000000 {
17 compatible = "arm,mps2-timer";
23 timer2: mps2-timer@40001000 {
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/Documentation/arch/arm/
Darm.rst2 ARM Linux 2.6 and upper
5 Please check <ftp://ftp.arm.linux.org.uk/pub/armlinux> for
9 ---------------------
11 In order to compile ARM Linux, you will need a compiler capable of
12 generating ARM ELF code with GNU extensions. GCC 3.3 is known to be
16 To build ARM Linux natively, you shouldn't have to alter the ARCH = line
17 in the top level Makefile. However, if you don't have the ARM Linux ELF
21 If you wish to cross-compile, then alter the following lines in the top
28 ARCH = arm
36 CROSS_COMPILE=<your-path-to-your-compiler-without-gcc>
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Dixp4xx.rst6 -------------------------------------------------------------------------
17 integration such as an on-chip I2C controller.
30 - Dual serial ports
31 - PCI interface
32 - Flash access (MTD/JFFS)
33 - I2C through GPIO on IXP42x
34 - GPIO for input/output/interrupts
35 See arch/arm/mach-ixp4xx/include/mach/platform.h for access functions.
36 - Timers (watchdog, OS)
41 - USB device interface
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/Documentation/ABI/testing/
Dsysfs-bus-platform1 What: /sys/bus/platform/devices/.../driver_override
10 to the driver_override file (echo vfio-platform > \
18 devices to opt-out of driver binding using a driver_override
22 What: /sys/bus/platform/devices/.../numa_node
26 This file contains the NUMA node to which the platform device
30 arm smmu which are populated by arm64 acpi_iort.
32 What: /sys/bus/platform/devices/.../msi_irqs/
40 What: /sys/bus/platform/devices/.../msi_irqs/<N>
46 What: /sys/bus/platform/devices/.../modalias
50 A platform device that it is exposed via devicetree uses:
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Dsysfs-devices-soc5 The /sys/devices/ directory contains a sub-directory for each
6 System-on-Chip (SoC) device on a running platform. Information
8 functionality is only available if implemented by the platform.
11 about devices which are commonly contained in /sys/devices/platform.
19 Read-only attribute common to all SoCs. Contains the SoC machine
26 Read-only attribute common to all SoCs. Contains SoC family name
29 On many of ARM based silicon with SMCCC v1.2+ compliant firmware
47 For example, ARM has identity code 0x7F 0x7F 0x7F 0x7F 0x3B,
57 Read-only attribute supported by most SoCs. Contains the SoC's
64 Read-only attribute supported by most SoCs. In the case of
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/Documentation/devicetree/bindings/mailbox/
Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/arm,mhuv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM MHUv2 Mailbox Controller
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
14 The Arm Message Handling Unit (MHU) Version 2 is a mailbox controller that has
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
33 - Data-transfer: Each transfer is made of one or more words, using one or more
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/Documentation/arch/arm/samsung/
Doverview.rst2 Samsung ARM Linux Overview
6 ------------
8 The Samsung range of ARM SoCs spans many similar devices, from the initial
9 ARM9 through to the newest ARM cores. This document shows an overview of
15 - S3C64XX: S3C6400 and S3C6410
16 - S5PC110 / S5PV210
20 -------------
26 - S5PC110 specific default configuration
28 - S5PV210 specific default configuration
32 ------
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/Documentation/arch/arm64/
Dacpi_object_usage.rst16 - Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT
18 - Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT
20 - Optional: AGDI, BGRT, CEDT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT,
24 - Not supported: AEST, APMT, BOOT, DBGP, DMAR, ETDT, HPET, IVRS, LPIT,
32 **Arm Error Source Table**
35 compliant with the Arm RAS architecture.
39 **Arm Generic diagnostic Dump and Reset Device Interface Table**
41 This table describes a non-maskable event, that is used by the platform
46 **Arm Performance Monitoring Table**
55 Must be supplied if RAS support is provided by the platform. It
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Darm-acpi.rst2 ACPI on Arm systems
6 the BSA (Arm Base System Architecture) [0] and BBR (Arm
9 Arm Servers, in addition to being BSA compliant, comply with a set
12 The Arm kernel implements the reduced hardware model of ACPI version
18 If an Arm system does not meet the requirements of the BSA and BBR,
23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
29 Why ACPI on Arm?
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
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/Documentation/devicetree/
Dusage-model.rst1 .. SPDX-License-Identifier: GPL-2.0
44 ----------
56 In 2005, when PowerPC Linux began a major cleanup and to merge 32-bit
57 and 64-bit support, the decision was made to require DT support on all
61 blob without requiring a real Open Firmware implementation. U-Boot,
66 existing non-DT aware firmware.
70 architectures (arm, microblaze, mips, powerpc, sparc, and x86) and 1
74 -------------
79 -------------------
88 per-machine hard coded selections.
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