Searched full:bypass (Results 1 – 25 of 103) sorted by relevance
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| /Documentation/devicetree/bindings/usb/ |
| D | smsc,usb3503.yaml | 37 bypass-gpios: 40 GPIO for bypass. 41 Control signal to select between HUB MODE and BYPASS MODE. 57 Specifies initial mode. 1 for Hub mode, 2 for standby mode and 3 for bypass mode. 58 In bypass mode the downstream port 3 is connected to the upstream port with low 91 bypass-gpios: false 95 - bypass-gpios 138 bypass-gpios = <&gpx3 6 1>;
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-i2c-devices-bq32k | 5 Description: Attribute for enable/disable the trickle charge bypass 7 enable/disable the Trickle charge FET bypass.
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| D | sysfs-bus-iio-filter-admv8818 | 10 - bypass -> bypass low pass filter, high pass filter and disable/unregister
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| D | sysfs-class-regulator | 353 What: /sys/class/regulator/.../bypass 359 bypass. This indicates if the device is in bypass mode. 367 'enabled' means the regulator is in bypass mode.
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| /Documentation/devicetree/bindings/power/supply/ |
| D | bq25980.yaml | 54 ti,bypass-ovp-limit-microvolt: 61 ti,bypass-ocp-limit-microamp: 67 ti,bypass-enable: 69 description: Enables bypass mode at boot time
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| /Documentation/devicetree/bindings/regulator/ |
| D | richtek,rt4803.yaml | 15 supports boost and auto bypass mode that depends on the difference between the 17 transform to boost mode. Otherwise, turn on bypass switch to enter bypass mode.
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| D | ti-abb-regulator.txt | 32 0-bypass 82 1012500 0 0 0 0 0 /* Bypass */ 102 975000 0 0 0 0 0 /* Bypass */ 129 975000 0 0 0 0 0 /* Bypass */
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| D | sprd,sc2731-regulator.yaml | 17 their own bypass (power-down) control signals. It is recommended to use
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | dpll.txt | 5 (reference clock and bypass clock), with digital phase locked 36 and second entry bypass clock 55 - ti,low-power-bypass : DPLL output matches rate of parent bypass clock 79 ti,low-power-bypass;
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| D | fapll.txt | 5 (reference clock and bypass clock), and one or more child 13 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
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| D | apll.txt | 5 (reference clock and bypass clock), with analog phase locked 17 - clocks : link phandles of parent clocks (clk-ref and clk-bypass)
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| /Documentation/networking/ |
| D | nf_flowtable.rst | 21 transmitted to the output netdevice via neigh_xmit(), hence, packets bypass the 38 forwarding path including the Netfilter hooks and the flowtable fastpath bypass. 68 |__yes_________________fastpath bypass ____________________________| 84 Enabling the flowtable bypass is relatively easy, you only need to create a 109 forwarding bypass. 137 allows the flowtable to define a fastpath bypass between the bridge ports 143 fastpath bypass
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| /Documentation/devicetree/bindings/mfd/ |
| D | actions,atc260x.yaml | 68 regulator-allow-bypass: true 87 regulator-allow-bypass: true 103 regulator-allow-bypass: false 115 regulator-allow-bypass: false
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| D | omap-usb-host.txt | 32 - single-ulpi-bypass: Must be present if the controller contains a single 33 ULPI bypass control bit. e.g. OMAP3 silicon <= ES2.1
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| /Documentation/devicetree/bindings/hwmon/ |
| D | adt7475.yaml | 74 "^adi,bypass-attenuator-in[0-4]$": 123 adi,bypass-attenuator-in0 = <1>; 124 adi,bypass-attenuator-in1 = <0>;
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | fsl,imx8qxp-ldb.yaml | 53 - description: bypass clock 58 - const: bypass 139 clock-names = "pixel", "bypass";
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| /Documentation/devicetree/bindings/sound/ |
| D | cs35l32.txt | 22 dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode 24 2 = (Default) Boost voltage fixed in Bypass Mode (VBST = VP).
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| D | adi,max98396.yaml | 63 adi,bypass-slot-no: 66 audio processing bypass path.
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| /Documentation/arch/xtensa/ |
| D | atomctl.rst | 34 Developers might find using RCW in Bypass mode convenient when testing 45 Values WB - Write Back WT - Write Thru BY - Bypass
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| /Documentation/sound/cards/ |
| D | maya44.rst | 34 - analogue monitor a.k.a bypass 142 Bypass 143 … analogue bypass from ADC input to output for channel 1+2. Same as "Monitor" in the windows driver. 144 Bypass 1
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| /Documentation/networking/devlink/ |
| D | ti-cpsw-switch.rst | 26 - Enables ALE_CONTROL(4).BYPASS mode for debugging purposes. In this
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| /Documentation/admin-guide/device-mapper/ |
| D | dm-dust.rst | 71 Check the status of the read behavior ("bypass" indicates that all I/O 76 0 33552384 dust 252:17 bypass verbose 103 While the device is in "bypass" mode, reads and writes will succeed:: 106 0 33552384 dust 252:17 bypass
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| /Documentation/devicetree/bindings/clock/ |
| D | atmel,at91sam9x5-sckc.yaml | 35 atmel,osc-bypass:
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| /Documentation/filesystems/nfs/ |
| D | localio.rst | 15 bypass the network RPC protocol for read, write and commit operations. 16 Due to this XDR and RPC bypass, these operations will operate faster. 38 The performance advantage realized from LOCALIO's ability to bypass 80 a. Bypass use of the network RPC protocol as much as possible. This 283 Because LOCALIO is focused on protocol bypass to achieve improved IO 310 application uses O_DIRECT the NFS client will bypass the pagecache but
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| /Documentation/networking/dsa/ |
| D | configuration.rst | 309 entries using the bridge bypass operations (which do not update the software 319 Due to a bug, the bridge bypass FDB implementation provided by DSA did not 336 DSA switch using the bridge bypass operations, and works by mistake. Other 341 adding a bridge FDB entry to the switch: the bridge bypass discussed above, as 350 software FDB, and the support for its bridge bypass FDB implementation (using
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