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/Documentation/devicetree/bindings/net/can/
Dst,stm32-bxcan.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/can/st,stm32-bxcan.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 description: STMicroelectronics BxCAN controller for CAN bus
12 - Dario Binacchi <dario.binacchi@amarulasolutions.com>
15 - $ref: can-controller.yaml#
20 - st,stm32f4-bxcan
22 st,can-primary:
25 two CAN peripherals in dual CAN configuration. In that case they share
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/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,dw-apb-ictl.txt4 dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with
5 APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt
9 - compatible: shall be "snps,dw-apb-ictl"
10 - reg: physical base address of the controller and length of memory mapped
12 - interrupt-controller: identifies the node as an interrupt controller
13 - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1
15 Additional required property when it's used as secondary interrupt controller:
16 - interrupts: interrupt reference to primary interrupt controller
20 - 0 maps to bit 0 of low interrupts,
21 - 1 maps to bit 1 of low interrupts,
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/Documentation/arch/sparc/oradax/
Ddax-hv-api.txt3 Publication date 2017-09-25 08:21
5 Extracted via "pdftotext -f 547 -l 572 -layout sun4v_20170925.pdf"
16 live-migration and other system management activities.
20 …high speed processoring of database-centric operations. The coprocessors may support one or more of
28 …e Completion Area and, unless execution order is specifically restricted through the use of serial-
39 …machine, however, internal resource limitations within the virtual machine can cause CCB submissio…
45 …device node in the guest MD (Section 8.24.17, “Database Analytics Accelerators (DAX) virtual-device
51 36.1.1.1. "ORCL,sun4v-dax" Device Compatibility
54 • No-op/Sync
81 36.1.1.2. "ORCL,sun4v-dax-fc" Device Compatibility
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/Documentation/fb/
Dmatroxfb.rst15 * You can run XF{68,86}_FBDev or XFree86 fbdev driver on top of /dev/fb0
16 * Most important: boot logo :-)
34 box) and matroxfb (for graphics mode). You should not compile-in vesafb
35 unless you have primary display on non-Matrox VBE2.0 device (see
43 -------------
58 -------------------------
73 ----------
82 You can enter these number either hexadecimal (leading `0x`) or decimal
83 (0x100 = 256). You can also use value + 512 to achieve compatibility
86 Non-listed number can be achieved by more complicated command-line, for
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Dviafb.rst6 --------
15 ---------------
34 ----------------------
47 - 640x480 (default)
48 - 720x480
49 - 800x600
50 - 1024x768
53 - 8, 16, 32 (default:32)
56 - 60, 75, 85, 100, 120 (default:60)
59 - 0 : expansion (default)
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/Documentation/PCI/endpoint/
Dpci-ntb-howto.rst1 .. SPDX-License-Identifier: GPL-2.0
4 PCI Non-Transparent Bridge (NTB) Endpoint Function (EPF) User Guide
9 This document is a guide to help users use pci-epf-ntb function driver
13 Documentation/PCI/endpoint/pci-ntb-function.rst
19 ---------------------------
27 2900000.pcie-ep 2910000.pcie-ep
32 2900000.pcie-ep 2910000.pcie-ep
36 -------------------------
40 # ls /sys/bus/pci-epf/drivers
49 Creating pci-epf-ntb Device
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Dpci-endpoint-cfs.rst1 .. SPDX-License-Identifier: GPL-2.0
18 directory. configfs can be mounted using the following command::
20 mount -t configfs none /sys/kernel/config
54 Every <EPF device> directory consists of the following entries that can be
75 ... secondary/
79 Non-transparent bridge), symlink of endpoint controller connected to primary
81 controller connected to secondary interface should be added in 'secondary'
84 The <EPF Device> directory can have a list of symbolic links
111 that represents a physical function can be linked to a EPC device.
138 [1] Documentation/PCI/endpoint/pci-endpoint.rst
/Documentation/userspace-api/media/v4l/
Dvidioc-g-tuner.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_TUNER - VIDIOC_S_TUNER - Get or set tuner attributes
52 Since this is a write-only ioctl, it does not return the actually
68 .. flat-table:: struct v4l2_tuner
69 :header-rows: 0
70 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - :cspan:`1` Identifies the tuner, set by the application.
75 * - __u8
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/Documentation/arch/x86/
Dentry_64.rst1 .. SPDX-License-Identifier: GPL-2.0
16 for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
17 arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
18 syscall entry points and thus provides for 32-bit processes the
19 ability to execute syscalls when running on 64-bit kernels.
25 - system_call: syscall instruction from 64-bit code.
27 - entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
30 - entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
33 - interrupt: An array of entries. Every IDT vector that doesn't
36 magically-generated functions that make their way to common_interrupt()
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/Documentation/hwmon/
Dlm83.rst10 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
18 Addresses scanned: I2C 0x18 - 0x1a, 0x29 - 0x2b, 0x4c - 0x4e
27 -----------
34 in that the later can only sense the temperature of one external diode.
40 list and an unconfirmed list follow. If you can confirm or infirm the
42 contact us. Note that the LM90 can easily be misdetected as a LM83.
52 Gigabyte GA-8IK1100
54 Soltek SL-75DRV5
63 The fact that the LM83 is only scarcely used can be easily explained.
66 sensors. This means that temperature-only chips are usually used as
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Dnct6775.rst19 * Nuvoton NCT5572D/NCT6771F/NCT6772F/NCT6775F/W83677HG-I
83 * Nuvoton NCT6796D-S/NCT6799D-R
93 Guenter Roeck <linux@roeck-us.net>
96 -----------
104 can be monitored and compared against minimum, maximum, and critical
121 NCT6775F, fan readings can be divided by a programmable divider (1, 2, 4, 8,
138 The mode works for fan1-fan5.
141 ----------------
143 pwm[1-7]
144 - this file stores PWM duty cycle or DC value (fan speed) in range:
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/Documentation/admin-guide/device-mapper/
Ddm-zoned.rst2 dm-zoned
5 The dm-zoned device mapper target exposes a zoned block device (ZBC and
7 pattern constraints. In effect, it implements a drive-managed zoned
10 host-managed zoned block devices and can mitigate the potential
11 device-side performance degradation due to excessive random writes on
12 host-aware zoned block devices.
21 http://www.t13.org/Documents/UploadedDocuments/docs2015/di537r05-Zoned_Device_ATA_Command_Set_ZAC.p…
23 The dm-zoned implementation is simple and minimizes system overhead (CPU
25 host-managed disk with 256 MB zones, dm-zoned memory usage per disk
29 dm-zoned target devices are formatted and checked using the dmzadm
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Dverity.rst2 dm-verity
5 Device-Mapper's "verity" target provides transparent integrity checking of
7 This target is read-only.
21 This is the type of the on-disk hash format.
40 dm-verity device.
51 inaccessible. You can place hashes to the same partition as data, in this
55 This is the offset, in <hash_block_size>-blocks, from the start of hash_dev
72 the optional parameters section can be skipped or #opt_params can be zero.
110 is M-N.
122 rather than every time. This reduces the overhead of dm-verity so that it
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/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-palmas.txt3 The pins of Palmas device can be set on different option and provides
7 - compatible: It must be one of following:
8 - "ti,palmas-pinctrl" for Palma series of the pincontrol.
9 - "ti,tps65913-pinctrl" for Palma series device TPS65913.
10 - "ti,tps80036-pinctrl" for Palma series device TPS80036.
12 Please refer to pinctrl-bindings.txt in this directory for details of the
18 list of pins. This configuration can include the mux function to select on
19 those pin(s), and various pin configuration parameters, such as pull-up,
32 - ti,palmas-enable-dvfs1: Enable DVFS1. Configure pins for DVFS1 mode.
33 Selection primary or secondary function associated to I2C2_SCL_SCE,
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/Documentation/admin-guide/blockdev/
Dzram.rst2 zram: Compressed RAM-based block devices
8 The zram module creates RAM-based block devices named /dev/zram<id>
20 There are several ways to configure and manage zram device(-s):
23 b) using zramctl utility, provided by util-linux (util-linux@vger.kernel.org).
28 In order to get a better idea about zramctl please consult util-linux
29 documentation, zramctl man-page or `zramctl --help`. Please be informed
30 that zram maintainers do not develop/maintain util-linux or zramctl, should
31 you have any questions please contact util-linux@vger.kernel.org
45 -EBUSY an attempt to modify an attribute that cannot be changed once
47 -ENOMEM zram was not able to allocate enough memory to fulfil your
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/Documentation/ABI/testing/
Dsysfs-block-zram5 The disksize file is read-write and specifies the disk size
7 that can be stored in this disk.
14 The initstate file is read-only and shows the initialization
21 The reset file is write-only and allows resetting the
29 The max_comp_streams file is read-write and specifies the
37 The comp_algorithm file is read-write and lets to show
45 The mem_used_max file is write-only and is used to reset
48 "0". Otherwise, you could see -EINVAL.
55 The mem_limit file is write-only and specifies the maximum
56 amount of memory ZRAM can use to store the compressed data.
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/Documentation/userspace-api/media/
Dfdl-appendix.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
10 .. _fdl-preamble:
31 does. But this License is not limited to software manuals; it can be
37 .. _fdl-section1:
43 .. _fdl-document:
46 placed by the copyright holder saying it can be distributed under the
52 .. _fdl-modified:
59 .. _fdl-secondary:
61 A "Secondary Section" is a named appendix or a front-matter section of
62 the :ref:`Document <fdl-document>` that deals exclusively with the
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/Documentation/mm/
Dmmu_notifier.rst8 For secondary TLB (non CPU TLB) like IOMMU TLB or device TLB (when device use
11 those secondary TLB while holding page table lock when clearing a pte/pmd:
23 - take page table lock
24 - clear page table entry and notify ([pmd/pte]p_huge_clear_flush_notify())
25 - set page table entry to point to new page
28 the new pte/pmd value then you can break memory model like C11 or C++11 for
33 Two address addrA and addrB such that \|addrA - addrB\| >= PAGE_SIZE we assume
38 [Time N] --------------------------------------------------------------------
39 CPU-thread-0 {try to write to addrA}
40 CPU-thread-1 {try to write to addrB}
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/Documentation/devicetree/bindings/display/
Dtruly,nt35597.txt7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
20 - ports: This device has two video ports driven by two DSIs. Their connections
23 - port@0: DSI input port driven by master DSI
24 - port@1: DSI input port driven by secondary DSI
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/Documentation/devicetree/bindings/sound/
Dti,tlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
20 Specifications can be found at:
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
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/Documentation/driver-api/usb/
Dbulk-streams.rst8 device driver to overload a bulk endpoint so that multiple transfers can be
13 Protocol, which uses streams to queue multiple SCSI commands, can be found on
17 Device-side implications
21 an out-of-band mechanism on another endpoint) that data is ready for that stream
23 can also initiate a transfer on a stream without the device asking, but the
24 device can refuse that transfer. Devices can switch between streams at any
38 allocate memory so the driver can use up to num_streams stream IDs. They must
41 ID for the bulk IN and OUT endpoints used in a Bi-directional command sequence.
46 declares how many stream IDs it can support, and each bulk endpoint on a
47 SuperSpeed device will say how many stream IDs it can handle. Therefore,
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/Documentation/devicetree/bindings/mips/brcm/
Dsoc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Florian Fainelli <f.fainelli@gmail.com>
14 The experimental -viper variants are for running Linux on the 3384's
23 - brcm,bcm3368
24 - brcm,bcm3384
25 - brcm,bcm33843
26 - brcm,bcm3384-viper
27 - brcm,bcm33843-viper
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/Documentation/crypto/
Dasymmetric-keys.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Asymmetric / Public-key Cryptography Key Type
9 - Overview.
10 - Key identification.
11 - Accessing asymmetric keys.
12 - Signature verification.
13 - Asymmetric key subtypes.
14 - Instantiation data parsers.
15 - Keyring link restrictions.
22 public-key cryptography, without imposing any particular restrictions on the
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/Documentation/devicetree/bindings/pci/
Dpci.txt3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
27 - reset-gpios:
28 If present this property specifies PERST# GPIO. Host drivers can parse the
30 - supports-clkreq:
32 root port to downstream device and host bridge drivers can do programming
34 not to advertise ASPM L1 Sub-States support if there is no CLKREQ signal.
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/Documentation/driver-api/hte/
Dhte.rst1 .. SPDX-License-Identifier: GPL-2.0+
10 ------------
12 Certain devices have built in hardware timestamping engines which can
14 change; upon detecting the change they can automatically store the timestamp at
19 This document describes the API that can be used by hardware timestamping
25 ----------------------------------------
27 .. kernel-doc:: drivers/hte/hte.c
31 ----------------------------------------
33 .. kernel-doc:: drivers/hte/hte.c
37 -----------------------------------
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