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/Documentation/scheduler/
Dsched-capacity.rst2 Capacity Aware Scheduling
5 1. CPU Capacity
16 CPU capacity is a measure of the performance a CPU can reach, normalized against
18 asymmetric CPU capacity systems, as they contain CPUs of different capacities.
20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems
36 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
41 Two different capacity values are used within the scheduler. A CPU's
42 ``original capacity`` is its maximum attainable capacity, i.e. its maximum
43 attainable performance level. This original capacity is returned by
44 the function arch_scale_cpu_capacity(). A CPU's ``capacity`` is its ``original
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Dsched-energy.rst64 knowledge about the platform's topology, which include the 'capacity' of CPUs,
71 EAS (as well as the rest of the scheduler) uses the notion of 'capacity' to
72 differentiate CPUs with different computing throughput. The 'capacity' of a CPU
74 frequency compared to the most capable CPU of the system. Capacity values are
77 to capacity and utilization values, EAS is able to estimate how big/busy a
79 energy trade-offs. The capacity of CPUs is provided via arch-specific code
135 for the CPU with the highest spare capacity (CPU capacity - CPU utilization) in
161 The CPU capacity and power cost associated with each OPP is listed in
185 maximum spare capacity in the two performance domains. In this example,
283 being run, they will require all of the available CPU capacity, and there isn't
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Dindex.rst17 sched-capacity
Dschedutil.rst7 All this assumes a linear relation between frequency and work capacity,
90 - Documentation/scheduler/sched-capacity.rst:"1. CPU Capacity + 2. Task utilization"
/Documentation/translations/zh_CN/scheduler/
Dsched-capacity.rst4 :Original: Documentation/scheduler/sched-capacity.rst
27 我们引入CPU算力(capacity)的概念来测量每个CPU能达到的性能,它的值相对系统中性能最强的CPU
42 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
48 CPU的 ``capacity`` 是 ``capacity_orig`` 扣除了一些性能损失(比如处理中断的耗时)的值。
50 注意CPU的 ``capacity`` 仅仅被设计用于CFS调度类,而 ``capacity_orig`` 是不感知调度类的。为
51 简洁起见,本文档的剩余部分将不加区分的使用术语 ``capacity`` 和 ``capacity_orig`` 。
67 - capacity(CPU0) = C
68 - capacity(CPU1) = C/2
98 - capacity(CPU0) = C
99 - capacity(CPU1) = C/3
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Dindex.rst26 sched-capacity
Dschedutil.rst89 …- Documentation/translations/zh_CN/scheduler/sched-capacity.rst:"1. CPU Capacity + 2. Task utiliza…
/Documentation/devicetree/bindings/cpu/
Dcpu-capacity.txt2 CPU capacity bindings
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
27 final capacity should, however, be:
43 3 - capacity-dmips-mhz
46 capacity-dmips-mhz is an optional cpu node [1] property: u32 value
47 representing CPU capacity expressed in normalized DMIPS/MHz. At boot time, the
48 maximum frequency available to the cpu is then used to calculate the capacity
51 capacity-dmips-mhz property is all-or-nothing: if it is specified for a cpu
53 fall back to the default capacity value for every CPU. If cpufreq is not
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/Documentation/power/
Dpower_supply_class.rst61 | **Charge/Energy/Capacity - how to not confuse** |
63 | **Because both "charge" (µAh) and "energy" (µWh) represents "capacity" |
67 | attributes represents capacity in µAh only. |
69 | attributes represents capacity in µWh only. |
70 | - `CAPACITY` |
71 | attribute represents capacity in *percents*, from 0 to 100. |
108 between voltage and battery capacity, but some dumb
109 batteries use voltage for very approximated calculation of capacity.
146 (typically 20% of battery capacity).
151 this setting (typically 10% of battery capacity).
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/Documentation/devicetree/bindings/power/supply/
Dbattery.yaml64 description: battery design capacity
99 ocv-capacity-celsius:
102 for each of the battery capacity lookup table.
126 '^ocv-capacity-table-[0-9]+$':
130 of the battery and corresponding battery capacity percent, which is used
131 to look up battery capacity according to current OCV value. And the open
137 - description: battery capacity percent
162 ocv-capacity-celsius = <(-10) 0 10>;
164 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>;
166 ocv-capacity-table-1 = <4200000 100>, <4185000 95>, <4113000 90>;
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Dmaxim,ds2760.yaml35 rated-capacity-microamp-hours:
37 The rated capacity of the battery, in mAh.
Dbq24190.yaml56 (typically 20% of battery capacity).
59 setting (typically 10% of battery capacity).
Dsc27xx-fg.yaml76 ocv-capacity-celsius = <20>;
77 ocv-capacity-table-0 = <4185000 100>, <4113000 95>, <4066000 90>,
Dmaxim,max17040.yaml42 Certain devices return double the capacity.
44 SoC == State of Charge == Capacity.
/Documentation/devicetree/bindings/net/
Dmarvell-neta-bm.txt12 - pool<0 : 3>,capacity: size of external buffer pointers' ring maintained
34 pool2,capacity = <4096>;
/Documentation/devicetree/bindings/riscv/
Dcpus.yaml116 capacity-dmips-mhz:
118 u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in
119 DMIPS/MHz, relative to highest capacity-dmips-mhz
/Documentation/admin-guide/laptops/
Dlg-laptop.rst42 sets the maximum capacity to charge the battery. Limiting the charge
43 reduces battery capacity loss over time.
/Documentation/ABI/testing/
Dsysfs-class-power-surface6 Battery trip point. When the remaining battery capacity crosses this
/Documentation/core-api/
Dfolio_queue.rst86 to check that the capacity wasn't overrun and the list will not be extended
132 The first function returns the maximum capacity of a segment. It must not be
135 segment has been filled to capacity.
199 with a slot number equal to the capacity of that segment. The iterator will
/Documentation/driver-api/cxl/
Dmaturity-map.rst151 * [0] Dynamic Capacity Device (DCD) Support
162 * [0] Dynamic Capacity Device Support
184 memory-side cache where the cache capacity extends the SRAT address
185 range capacity. `See the ECN
/Documentation/devicetree/bindings/opp/
Dopp-v2-kryo-cpu.yaml121 capacity-dmips-mhz = <1024>;
141 capacity-dmips-mhz = <1024>;
156 capacity-dmips-mhz = <1024>;
176 capacity-dmips-mhz = <1024>;
/Documentation/devicetree/bindings/thermal/
Dthermal-idle.yaml71 capacity-dmips-mhz = <1024>;
87 capacity-dmips-mhz = <1024>;
/Documentation/driver-api/mmc/
Dmmc-dev-attrs.rst76 For MMC, "preferred_erase_size" is the high-capacity
78 based on the capacity of the card.
/Documentation/devicetree/bindings/clock/
Dmediatek,mt8186-sys-clock.yaml24 The device nodes also provide the system control capacity for configuration.
Dmediatek,mt8188-sys-clock.yaml24 The device nodes also provide the system control capacity for configuration.

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