Searched full:chipselect (Results 1 – 25 of 30) sorted by relevance
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| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | lbc.txt | 1 * Chipselect/Local Bus
6 chipselect number, and the remaining cells are the
7 offset into the chipselect.
8 - #size-cells : Either one or two, depending on how large each chipselect
10 - ranges : Each range corresponds to a single chipselect, and cover
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| /Documentation/devicetree/bindings/mtd/ |
| D | davinci-nand.txt | 20 - ti,davinci-chipselect: number of chipselect. Indicates on the
21 davinci_nand driver which chipselect is used
39 - ti,davinci-mask-chipsel: mask for chipselect address. Needed to mask
40 addresses for given chipselect.
82 ti,davinci-chipselect = <1>;
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| /Documentation/devicetree/bindings/gpio/ |
| D | spear_spics.txt | 5 PL022 control. If chipselect remain under PL022 control then they would be
12 directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
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| /Documentation/devicetree/bindings/memory-controllers/fsl/ |
| D | fsl,ifc.yaml | 29 Should be either two or three. The first cell is the chipselect
30 number, and the remaining cells are the offset into the chipselect.
35 Either one or two, depending on how large each chipselect can be.
57 Each range corresponds to a single chipselect, and covers the entire
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| /Documentation/devicetree/bindings/iio/adc/ |
| D | renesas,rcar-gyroadc.yaml | 13 The GyroADC block is a reduced SPI block with up to 8 chipselect lines,
72 operation, single MB88101A is required. The Cx chipselect lines
81 A 3:8 chipselect demuxer is required to connect the nCS line
89 A 3:8 chipselect demuxer is required to connect the nCS line
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| /Documentation/devicetree/bindings/spi/ |
| D | spi-gpio.yaml | 36 description: GPIOs to use for chipselect lines.
42 description: Number of chipselect lines. Should be <0> if a single device
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| D | spi_oc_tiny.txt | 5 - gpios : should specify GPIOs used for chipselect.
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| D | spi-img-spfi.txt | 17 - cs-gpios: Must specify the GPIOs used for chipselect lines.
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| D | ti,qspi.yaml | 55 Handle to system control region containing QSPI chipselect register
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| D | spi-fsl-lpspi.yaml | 59 this property to re-config the chipselect value in the LPSPI driver.
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| D | fsl-spi.txt | 45 - fsl,espi-num-chipselects : the number of the chipselect signals.
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| D | fsl,dspi.yaml | 67 The number of the chip native chipselect signals.
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| D | omap-spi.yaml | 42 description: Number of chipselect supported by the instance.
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | ti-aemif.txt | 73 - ti,cs-chipselect: number of chipselect. Indicates on the aemif driver
74 which chipselect is used for accessing the memory. For
163 ti,cs-chipselect = <2>;
192 ti,cs-chipselect = <0>;
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| D | arm,pl172.txt | 45 which chipselect is used for accessing the memory.
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| /Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mcp23s08.txt | 26 SPI uses this to specify the chipselect line which the chip is
28 multiple chips on the same chipselect. Have a look at
35 SPI chipselect. Set a bit in bit0-7 in this mask to 1 if there is a
39 possible to mix mcp23s08 and mcp23s17 on the same chipselect. Set at
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| /Documentation/devicetree/bindings/net/ieee802154/ |
| D | adf7242.txt | 6 - reg: the chipselect index
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| D | mrf24j40.txt | 9 - reg: the chipselect index
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| D | mcr20a.txt | 7 - reg: the chipselect index
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| D | at86rf230.txt | 8 - reg: the chipselect index
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| D | cc2520.txt | 7 - reg: the chipselect index
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| /Documentation/devicetree/bindings/rtc/ |
| D | epson,rx6110.txt | 27 - spi-cs-high: RX6110 needs chipselect high
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| /Documentation/spi/ |
| D | spidev.rst | 74 For a SPI device with chipselect C on bus B, you should see:
113 the chipselect is deactivated between those operations. Full-duplex access,
114 and composite operation without chipselect de-activation, is available using
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| D | spi-summary.rst | 110 clock edge. The chipselect may have made it become available.
120 Note that the clock mode is relevant as soon as the chipselect goes
171 chipselect C, accessed through CTLR.
310 data or chipselect callbacks. This is stored in spi_device later.)
315 sharing a bus with a device that interprets chipselect "backwards" is
408 + whether the chipselect becomes inactive after a transfer and
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| /Documentation/driver-api/ |
| D | spi.rst | 12 additional chipselect line is usually active-low (nCS); four signals are
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