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/Documentation/devicetree/bindings/powerpc/opal/
Dsensor-groups.txt17 operations like clearing the min/max history of all
26 sensor groups like clearing min/max, enabling/disabling sensor
/Documentation/admin-guide/
Dclearing-warn-once.rst1 Clearing WARN_ONCE
Dindex.rst91 clearing-warn-once
/Documentation/arch/x86/
Dmds.rst81 clearing. Either the modified VERW instruction or via the L1D Flush
94 The kernel provides a function to invoke the buffer clearing:
179 sibling threads are offline CPU buffer clearing is not required.
181 The idle clearing is enabled on CPUs which are only affected by MSBDS
185 idle clearing would be a window dressing exercise and is therefore not
/Documentation/devicetree/bindings/gpio/
Dgpio-mmio.yaml57 will turn that line into an output line. Conversely, clearing a bit
61 will turn that line into an input line. Conversely, clearing a bit
/Documentation/devicetree/bindings/power/reset/
Dqcom,pshold.yaml14 Clearing that bit allows us to restart/power off. The difference between
/Documentation/mm/
Dmmu_notifier.rst4 When clearing a pte/pmd we are given a choice to notify the event through
11 those secondary TLB while holding page table lock when clearing a pte/pmd:
27 If clearing the page table entry is not followed by a notify before setting
/Documentation/ABI/testing/
Dsysfs-class-watchdog117 Clearing the boot code selection and timeout counter also
120 clearing those bits does nothing for both versions of the SoC.
Ddebugfs-tpmi40 clearing all the statuses can be done by writing "0\n" to this file.
Dsysfs-firmware-gsmi53 clearing though, and this writes to this file
Ddebugfs-cxl30 the device for the specified address. Clearing poison removes
/Documentation/admin-guide/hw-vuln/
Dreg-file-data-sampling.rst72 on If the CPU is vulnerable, enable mitigation; CPU buffer clearing
98 - The processor is vulnerable and the CPU buffer clearing mitigation is
Dmds.rst119 - The processor is vulnerable and the CPU buffer clearing mitigation is
145 CPU buffer clearing
247 for the MDS vulnerability, CPU buffer clearing on exit to
298 - Enable CPU buffer clearing
Dvmscape.rst23 Note that, BHI affected parts that use BHB clearing software mitigation e.g.
Dprocessor_mmio_stale_data.rst160 Kernel does the buffer clearing with x86_clear_cpu_buffers().
198 full If the CPU is vulnerable, enable mitigation; CPU buffer clearing
240 - The processor is vulnerable and the CPU buffer clearing mitigation is
/Documentation/translations/zh_CN/admin-guide/
Dindex.rst66 clearing-warn-once
/Documentation/translations/zh_TW/admin-guide/
Dindex.rst69 clearing-warn-once
/Documentation/arch/powerpc/
Ddexcr.rst109 * The set/clear terminology refers to setting/clearing the bit in the DEXCR.
170 For example, clearing NPHIE on exec is a privileged operation (a process
/Documentation/admin-guide/mm/
Dmultigen_lru.rst39 0x0002 Clearing the accessed bit in leaf page table entries in large
46 0x0004 Clearing the accessed bit in non-leaf page table entries as
/Documentation/core-api/
Dgfp_mask-from-fs-io.rst20 respectively __GFP_IO (note the latter implies clearing the first as well) in
/Documentation/virt/kvm/x86/
Dmsr.rst240 clearing the location; writing to the MSR forces KVM to re-scan its
320 EOI by clearing the bit in guest memory - this location will
337 clearing it to signal EOI to the hypervisor,
Derrata.rst27 Clearing these bits in CPUID has no effect on the operation of the guest;
/Documentation/virt/kvm/s390/
Ds390-pv-boot.rst73 non-clearing IPL subcodes are not allowed.
/Documentation/devicetree/bindings/thermal/
Dmediatek,lvts-thermal.yaml41 description: LVTS reset for clearing temporary data on AP/MCU.
/Documentation/devicetree/bindings/clock/ti/
Dgate.txt41 gates the clock and clearing the bit ungates the clock.

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