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/Documentation/devicetree/bindings/hwmon/
Dsensirion,sht15.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
16 clk-gpios:
19 data-gpios:
22 vcc-supply:
26 - compatible
27 - clk-gpios
28 - data-gpios
[all …]
Dnsa320-mcu.txt5 - compatible : "zyxel,nsa320-mcu"
6 - data-gpios : The GPIO pin connected to the data line on the MCU
7 - clk-gpios : The GPIO pin connected to the clock line on the MCU
8 - act-gpios : The GPIO pin connected to the active line on the MCU
13 compatible = "zyxel,nsa320-mcu";
14 pinctrl-0 = <&pmx_mcu_data &pmx_mcu_clk &pmx_mcu_act>;
15 pinctrl-names = "default";
17 data-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
18 clk-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
19 act-gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
/Documentation/devicetree/bindings/serio/
Dps2-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serio/ps2-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Danilo Krummrich <danilokrummrich@dk-develop.de>
14 const: ps2-gpio
16 data-gpios:
18 the gpio used for the data signal - this should be flagged as
20 from <dt-bindings/gpio/gpio.h> since the signal is open drain by
24 clk-gpios:
[all …]
/Documentation/devicetree/bindings/soc/tegra/
Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
33 - const: fast-clk
[all …]
/Documentation/devicetree/bindings/i2c/
Di2c-cbus-gpio.txt1 Device tree bindings for i2c-cbus-gpio driver
4 - compatible = "i2c-cbus-gpio";
5 - gpios: clk, dat, sel
6 - #address-cells = <1>;
7 - #size-cells = <0>;
10 - child nodes conforming to i2c bus binding
15 compatible = "i2c-cbus-gpio";
16 gpios = <&gpio 66 0 /* clk */
20 #address-cells = <1>;
21 #size-cells = <0>;
/Documentation/devicetree/bindings/gpio/
Dgpio-latch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/gpio-latch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sascha Hauer <s.hauer@pengutronix.de>
14 other GPIOs, like this:
16 CLK0 ----------------------. ,--------.
17 CLK1 -------------------. `--------|> #0 |
19 OUT0 ----------------+--|-----------|D0 Q0|-----|<
20 OUT1 --------------+-|--|-----------|D1 Q1|-----|<
[all …]
/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-wm8903.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-wm8903.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: nvidia,tegra-audio-common.yaml#
19 - items:
20 - pattern: '^[a-z0-9]+,tegra-audio-wm8903(-[a-z0-9]+)+$'
21 - const: nvidia,tegra-audio-wm8903
[all …]
Drt5668.txt7 - compatible : "realtek,rt5668b"
9 - reg : The I2C address of the device.
13 - interrupts : The CODEC's interrupt output.
15 - realtek,dmic1-data-pin
20 - realtek,dmic1-clk-pin
24 - realtek,jd-src
28 - realtek,ldo1-en-gpios : The GPIO that controls the CODEC's LDO1_EN pin.
43 interrupt-parent = <&gpio>;
45 realtek,ldo1-en-gpios =
47 realtek,dmic1-data-pin = <1>;
[all …]
Drt5682.txt7 - compatible : "realtek,rt5682" or "realtek,rt5682i"
9 - reg : The I2C address of the device.
11 - AVDD-supply: phandle to the regulator supplying analog power through the
14 - MICVDD-supply: phandle to the regulator supplying power for the microphone
17 - VBAT-supply: phandle to the regulator supplying battery power through the
20 - DBVDD-supply: phandle to the regulator supplying I/O power through the DBVDD
23 - LDO1-IN-supply: phandle to the regulator supplying power to the digital core
28 - interrupts : The CODEC's interrupt output.
30 - realtek,dmic1-data-pin
35 - realtek,dmic1-clk-pin
[all …]
Drealtek,rt5682s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Derek Fang <derek.fang@realtek.com>
13 Rt5682s(ALC5682I-VS) is a rt5682i variant which supports I2C only.
16 - $ref: dai-common.yaml#
30 realtek,dmic1-data-pin:
33 - 0 # dmic1 data is not used
34 - 1 # using GPIO2 pin as dmic1 data pin
35 - 2 # using GPIO5 pin as dmic1 data pin
[all …]
Dmt8186-mt6366-rt1019-rt5682s.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8186-mt6366-rt1019-rt5682s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jiaxin Yu <jiaxin.yu@mediatek.com>
16 - $ref: sound-card-common.yaml#
21 - mediatek,mt8186-mt6366-rt1019-rt5682s-sound
22 - mediatek,mt8186-mt6366-rt5682s-max98360-sound
23 - mediatek,mt8186-mt6366-rt5650-sound
25 audio-routing:
[all …]
Dnvidia,tegra-audio-rt5640.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5640.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: nvidia,tegra-audio-common.yaml#
19 - pattern: '^[a-z0-9]+,tegra-audio-rt56(39|40)(-[a-z0-9]+)+$'
20 - const: nvidia,tegra-audio-rt5640
22 nvidia,audio-routing:
[all …]
Dnvidia,tegra-audio-rt5677.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-rt5677.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jon Hunter <jonathanh@nvidia.com>
11 - Thierry Reding <thierry.reding@gmail.com>
14 - $ref: nvidia,tegra-audio-common.yaml#
19 - pattern: '^[a-z0-9]+,tegra-audio-rt5677(-[a-z0-9]+)+$'
20 - const: nvidia,tegra-audio-rt5677
22 nvidia,audio-routing:
[all …]
/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/Documentation/devicetree/bindings/net/
Dintel,ixp4xx-hss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
[all …]
/Documentation/devicetree/bindings/media/i2c/
Dhynix,hi846.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SK Hynix Hi-846 1/4" 8M Pixel MIPI CSI-2 sensor
10 - Martin Kepplinger <martin.kepplinger@puri.sm>
12 description: |-
13 The Hi-846 is a raw image sensor with an MIPI CSI-2 image data
18 - $ref: /schemas/media/video-interface-devices.yaml#
29 - description: Reference to the mclk clock.
31 assigned-clocks:
[all …]
/Documentation/devicetree/bindings/iio/adc/
Dadi,ad9467.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD9467 and similar High-Speed ADCs
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD9467 and the parts similar with it, are high-speed analog-to-digital
18 All the parts support the register map described by Application Note AN-877
19 https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf
21 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf
22 https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf
[all …]
/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Leilk Liu <leilk.liu@mediatek.com>
13 - $ref: /schemas/spi/spi-controller.yaml#
18 - items:
19 - enum:
20 - mediatek,mt7629-spi
21 - mediatek,mt8365-spi
[all …]
Dnuvoton,npcm-pspi.txt6 - compatible : "nuvoton,npcm750-pspi" for Poleg NPCM7XX.
7 "nuvoton,npcm845-pspi" for Arbel NPCM8XX.
8 - #address-cells : should be 1. see spi-bus.txt
9 - #size-cells : should be 0. see spi-bus.txt
10 - specifies physical base address and size of the register.
11 - interrupts : contain PSPI interrupt.
12 - clocks : phandle of PSPI reference clock.
13 - clock-names: Should be "clk_apb5".
14 - pinctrl-names : a pinctrl state named "default" must be defined.
15 - pinctrl-0 : phandle referencing pin configuration of the device.
[all …]
/Documentation/devicetree/bindings/display/msm/
Dhdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Rob Clark <robdclark@gmail.com>
16 - qcom,hdmi-tx-8084
17 - qcom,hdmi-tx-8660
18 - qcom,hdmi-tx-8960
19 - qcom,hdmi-tx-8974
20 - qcom,hdmi-tx-8994
21 - qcom,hdmi-tx-8996
[all …]
/Documentation/devicetree/bindings/media/
Dstih407-c8sectpfe.txt14 - compatible : Should be "stih407-c8sectpfe"
16 - reg : Address and length of register sets for each device in
17 "reg-names"
19 - reg-names : The names of the register addresses corresponding to the
21 - c8sectpfe: c8sectpfe registers
22 - c8sectpfe-ram: c8sectpfe internal sram
24 - clocks : phandle list of c8sectpfe clocks
25 - clock-names : should be "c8sectpfe"
26 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
28 - pinctrl-names : a pinctrl state named tsin%d-serial or tsin%d-parallel (where %d is tsin-num)
[all …]
/Documentation/devicetree/bindings/mfd/
Dcirrus,lochnagar.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of
25 [2] include/dt-bindings/pinctrl/lochnagar.h
26 [3] include/dt-bindings/clock/lochnagar.h
28 And these documents for the required sub-node binding details:
35 - if:
39 - cirrus,lochnagar2
[all …]
/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx93-mipi-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx93-mipi-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
15 and extensions to them are controlled by i.MX93 media blk-ctrl.
18 - $ref: snps,dw-mipi-dsi.yaml#
22 const: fsl,imx93-mipi-dsi
26 - description: apb clock
27 - description: pixel clock
[all …]
/Documentation/devicetree/bindings/mmc/
Dcavium-mmc.txt10 - compatible : should be one of:
11 cavium,octeon-6130-mmc
12 cavium,octeon-7890-mmc
13 cavium,thunder-8190-mmc
14 cavium,thunder-8390-mmc
15 mmc-slot
16 - reg : mmc controller base registers
17 - clocks : phandle
20 - for cd, bus-width and additional generic mmc parameters
22 - cavium,cmd-clk-skew : number of coprocessor clocks before sampling command
[all …]
/Documentation/devicetree/bindings/net/dsa/
Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
24 - microchip,ksz8863
[all …]

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