Searched full:clks (Results 1 – 25 of 158) sorted by relevance
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| /Documentation/devicetree/bindings/sound/ |
| D | fsl,imx-asrc.yaml | 158 clocks = <&clks IMX6QDL_CLK_ASRC_IPG>,
159 <&clks IMX6QDL_CLK_ASRC_MEM>, <&clks 0>,
160 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
161 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
162 <&clks 0>, <&clks 0>, <&clks 0>, <&clks 0>,
163 <&clks IMX6QDL_CLK_ASRC>, <&clks 0>, <&clks 0>,
164 <&clks IMX6QDL_CLK_SPBA>;
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| D | fsl,spdif.yaml | 142 clocks = <&clks 197>, <&clks 3>,
143 <&clks 197>, <&clks 107>,
144 <&clks 0>, <&clks 118>,
145 <&clks 62>, <&clks 139>,
146 <&clks 0>;
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| D | ac97-bus.txt | 21 clocks = <&clks CLK_AC97>, <&clks CLK_AC97CONF>;
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| D | fsl,esai.yaml | 111 clocks = <&clks 208>, <&clks 118>, <&clks 208>;
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| /Documentation/devicetree/bindings/clock/ |
| D | lsi,axm5516-clks.txt | 5 - compatible : shall contain "lsi,axm5516-clks"
15 clks: clock-controller@2010020000 {
16 compatible = "lsi,axm5516-clks";
25 clocks = <&clks AXXIA_CLK_PER>;
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| D | allwinner,sun9i-a80-usb-clks.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-usb-clks.yaml#
21 const: allwinner,sun9i-a80-usb-clks
51 compatible = "allwinner,sun9i-a80-usb-clks";
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| D | allwinner,sun9i-a80-de-clks.yaml | 4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-de-clks.yaml#
21 const: allwinner,sun9i-a80-de-clks
58 compatible = "allwinner,sun9i-a80-de-clks";
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| D | clps711x-clock.txt | 14 clks: clks@80000000 {
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| D | stericsson,u8500-clks.yaml | 4 $id: http://devicetree.org/schemas/clock/stericsson,u8500-clks.yaml#
25 - stericsson,u8500-clks
26 - stericsson,u8540-clks
27 - stericsson,u9540-clks
146 compatible = "stericsson,u8500-clks";
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| D | vf610-clock.txt | 27 clks: ccm@4006b000 {
39 clocks = <&clks VF610_CLK_UART1>;
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| /Documentation/devicetree/bindings/power/ |
| D | fsl,imx-gpc.yaml | 123 clocks = <&clks IMX6QDL_CLK_IPG>;
139 clocks = <&clks IMX6QDL_CLK_GPU3D_CORE>,
140 <&clks IMX6QDL_CLK_GPU3D_SHADER>,
141 <&clks IMX6QDL_CLK_GPU2D_CORE>,
142 <&clks IMX6QDL_CLK_GPU2D_AXI>,
143 <&clks IMX6QDL_CLK_OPENVG_AXI>,
144 <&clks IMX6QDL_CLK_VPU_AXI>;
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| /Documentation/devicetree/bindings/timer/ |
| D | fsl,ftm-timer.yaml | 56 clocks = <&clks VF610_CLK_FTM2>, <&clks VF610_CLK_FTM3>,
57 <&clks VF610_CLK_FTM2_EXT_FIX_EN>, <&clks VF610_CLK_FTM3_EXT_FIX_EN>;
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| D | cirrus,clps711x-timer.txt | 21 clocks = <&clks 5>;
28 clocks = <&clks 6>;
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| /Documentation/devicetree/bindings/display/imx/ |
| D | fsl,imx-lcdc.yaml | 108 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
123 clocks = <&clks 103>, <&clks 49>, <&clks 66>;
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| D | ldb.txt | 84 clocks = <&clks IMX5_CLK_LDB_DI0_SEL>,
85 <&clks IMX5_CLK_LDB_DI1_SEL>,
86 <&clks IMX5_CLK_IPU_DI0_SEL>,
87 <&clks IMX5_CLK_IPU_DI1_SEL>,
88 <&clks IMX5_CLK_LDB_DI0_GATE>,
89 <&clks IMX5_CLK_LDB_DI1_GATE>;
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| /Documentation/devicetree/bindings/mtd/ |
| D | lpc32xx-slc.txt | 11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
33 nxp,wdr-clks = <14>;
37 nxp,rdr-clks = <14>;
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| D | vf610-nfc.txt | 12 - assigned-clocks: main clock from the SoC, for Vybrid <&clks VF610_CLK_NFC>;
45 clocks = <&clks VF610_CLK_NFC>;
47 assigned-clocks = <&clks VF610_CLK_NFC>;
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| /Documentation/devicetree/bindings/pwm/ |
| D | fsl,vf610-ftm-pwm.yaml | 84 clocks = <&clks VF610_CLK_FTM0>,
85 <&clks VF610_CLK_FTM0_EXT_SEL>,
86 <&clks VF610_CLK_FTM0_FIX_SEL>,
87 <&clks VF610_CLK_FTM0_EXT_FIX_EN>;
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| /Documentation/devicetree/bindings/gpu/ |
| D | vivante,gc.yaml | 69 clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
70 <&clks IMX6QDL_CLK_GPU3D_CORE>,
71 <&clks IMX6QDL_CLK_GPU3D_SHADER>;
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| /Documentation/devicetree/bindings/rtc/ |
| D | rtc-mxc.yaml | 54 clocks = <&clks IMX27_CLK_CKIL>,
55 <&clks IMX27_CLK_RTC_IPG_GATE>;
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| /Documentation/devicetree/bindings/dma/ |
| D | fsl,imx-dma.yaml | 68 clocks = <&clks IMX27_CLK_DMA_IPG_GATE>, <&clks IMX27_CLK_DMA_AHB_GATE>;
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| /Documentation/devicetree/bindings/crypto/ |
| D | fsl-imx-sahara.yaml | 71 clocks = <&clks IMX27_CLK_SAHARA_IPG_GATE>,
72 <&clks IMX27_CLK_SAHARA_AHB_GATE>;
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| /Documentation/devicetree/bindings/mmc/ |
| D | fsl-imx-mmc.yaml | 59 clocks = <&clks 29>, <&clks 60>;
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| /Documentation/devicetree/bindings/net/can/ |
| D | bosch,m_can.yaml | 145 clocks = <&clks IMX6SX_CLK_CANFD>,
146 <&clks IMX6SX_CLK_CANFD>;
162 clocks = <&clks IMX6SX_CLK_CANFD>,
163 <&clks IMX6SX_CLK_CANFD>;
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| /Documentation/devicetree/bindings/ata/ |
| D | imx-sata.yaml | 126 clocks = <&clks IMX6QDL_CLK_SATA>,
127 <&clks IMX6QDL_CLK_SATA_REF_100M>,
128 <&clks IMX6QDL_CLK_AHB>;
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