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/Documentation/devicetree/bindings/clock/
Dfsl,qoriq-clock.yaml30 The clockgen node should act as a clock provider, though in older device
31 trees the children of the clockgen node are the clock providers.
38 - fsl,p2041-clockgen
39 - fsl,p3041-clockgen
40 - fsl,p4080-clockgen
41 - fsl,p5020-clockgen
42 - fsl,p5040-clockgen
43 - const: fsl,qoriq-clockgen-1.0
46 - fsl,t1023-clockgen
47 - fsl,t1024-clockgen
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/Documentation/devicetree/bindings/clock/st/
Dst,clkgen.txt1 Binding for a Clockgen hardware block found on
4 A Clockgen node can contain pll, diviser or multiplexer nodes.
6 We will find only the base address of the Clockgen, this base
45 clockgen-a@90ff000 {
Dst,clkgen-pll.txt28 clockgen-a9@92b0000 {
32 clockgen_a9_pll: clockgen-a9-pll {
38 clock-output-names = "clockgen-a9-pll-odf";
Dst,flexgen.txt8 Flexgen structure is a part of Clockgen[1].
12 Clockgen block diagram
/Documentation/devicetree/bindings/spi/
Dspi-nxp-fspi.yaml71 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
83 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>,
84 <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>;
Dfsl,spi-fsl-qspi.yaml70 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
84 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>,
85 <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>;
/Documentation/devicetree/bindings/nvmem/
Dfsl,layerscape-sfp.yaml56 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
60 clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL