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/Documentation/userspace-api/media/v4l/
Ddev-encoder.rst87 1. To enumerate the set of coded formats supported by the encoder, the
99 * In order to enumerate raw formats supported by a given coded format,
100 the client must first set that coded format on ``CAPTURE`` and then
107 * Values returned by :c:func:`VIDIOC_ENUM_FRAMESIZES` for a coded pixel
108 format will include all possible coded resolutions supported by the
109 encoder for the given coded pixel format.
113 encoder for the given raw pixel format and coded format currently set on
122 * Values returned by :c:func:`VIDIOC_ENUM_FRAMEINTERVALS` for a coded pixel
123 format and coded resolution will include all possible frame intervals
124 supported by the encoder for the given coded pixel format and resolution.
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Ddev-decoder.rst60 coded format
64 coded height
65 height for given coded resolution.
67 coded resolution
72 coded width
73 width for given coded resolution.
83 coded format includes a feature of frame reordering; for decoders,
154 for example: coded resolution, visible resolution, codec profile.
161 display purposes; must be smaller or equal to coded resolution;
217 1. To enumerate the set of coded formats supported by the decoder, the
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Dvidioc-enum-fmt.rst161 - The hardware decoder for this compressed bytestream format (aka coded
172 compressed bytestream format (aka coded format). It will notify the user
181 - The hardware encoder supports setting the ``CAPTURE`` coded frame
184 also sets the ``CAPTURE`` coded frame interval to the same value.
185 If this flag is set, then the ``CAPTURE`` coded frame interval can be
188 a hint for reserving hardware encoder resources and the ``CAPTURE`` coded
Dpixfmt-srggb8-pisp-comp.rst29 of 8 horizontally-contiguous pixels is coded using 8 bytes.
39 coded independently by 32-bit words at successive locations in memory.
48 (q1,q2) both in the range [384..511], they are coded using 9 bits for q1
57 is encoded as (q0-MAX(0,q1-64)). q3 is likewise coded based on q2.
68 Each pair of quantized pixels (q0,q1) or (q2,q3) is jointly coded
Dvidioc-g-enc-index.rst127 - This is an Intra-coded picture.
130 - This is a Predictive-coded picture.
133 - This is a Bidirectionally predictive-coded picture.
Ddev-stateless-decoder.rst38 1. To enumerate the set of coded formats supported by the decoder, the client
72 1. Set the coded format on the ``OUTPUT`` queue via :c:func:`VIDIOC_S_FMT`.
80 a coded pixel format.
83 coded width and height parsed from the stream.
242 controls that must be set on the request, depend on the active coded pixel
325 independently. They are returned in decode order (i.e. the same order as coded
Dext-ctrls-codec-stateless.rst554 - Picture Order Count for the coded top field
557 - Picture Order Count for the coded bottom field
646 with B-coded and P-coded frames. The timestamp refers to the
821 with P-coded frames. The timestamp refers to the
1008 with inter-coded frames. The timestamp refers to the ``timestamp`` field in
1015 with inter-coded frames. The timestamp refers to the ``timestamp`` field in
1022 with inter-coded frames. The timestamp refers to the ``timestamp`` field in
1348 with B-coded and P-coded frames. The timestamp refers to the
1355 with B-coded frames. The timestamp refers to the ``timestamp`` field in
1401 - If set motion vectors are coded for intra macroblocks.
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Dext-ctrls-jpeg.rst59 interval unit is MCU (Minimum Coded Unit) and its value is contained
/Documentation/devicetree/bindings/sound/
Dnvidia,tegra210-dmic.yaml12 Pulse Coded Modulation (PCM) signals. DMIC can be viewed as a PDM
/Documentation/admin-guide/cgroup-v1/
Dnet_prio.rst12 1) The application may not have been coded to set this value
/Documentation/filesystems/ext4/
Djournal.rst350 journal. Descriptor blocks are open-coded instead of being completely
364 - (open coded)
368 - open coded array[]
410 - This field appears to be open coded. It always comes at the end of the
481 - This field appears to be open coded. It always comes at the end of the
601 - (open coded)
/Documentation/devicetree/bindings/usb/
Dusb-drd.yaml16 which the device and its descriptors are compliant, in binary-coded
Daspeed,usb-vhub.yaml64 description: vhub Device Revision in binary-coded decimal
/Documentation/networking/
Dx25-iface.rst14 The X.25 device driver will be coded normally as per the Linux device driver
Dnetdev-features.rst77 set can be reduced further by networking core imposed limitations (as coded
/Documentation/ABI/testing/
Ddebugfs-cros-ec69 Supply 0 to use the default value coded into EC firmware. Supply
/Documentation/admin-guide/
Dunicode.rst49 hard-coded to map directly to the loaded font, bypassing the
73 character, and hence has been coded as U+2500 FORMS LIGHT HORIZONTAL.
Dlockup-watchdogs.rst53 'softlockup detector' (coded inside the hrtimer callback function)
/Documentation/devicetree/bindings/pwm/
Dpwm-amlogic.yaml93 # known (hard-coded) in the driver and used to select pwm clock
/Documentation/arch/arm/
Dporting.rst39 The initial part of the kernel is carefully coded to be position
/Documentation/devicetree/bindings/iio/adc/
Dmicrochip,mcp3564.yaml87 potential confusion. This address is coded on two bits, so four possible
/Documentation/locking/
Dpi-futex.rst68 even if all critical sections are coded carefully to be deterministic
/Documentation/devicetree/bindings/
Ddts-coding-style.rst197 external reference SoC input clock, which could be coded as a fixed-clock in
/Documentation/arch/x86/
Dxstate.rst17 Legacy userspace libraries often have hard-coded, static sizes for
/Documentation/devicetree/bindings/regulator/
Dti-abb-regulator.txt68 Example #1: Simplest configuration (no efuse data, hard coded ABB table):

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