Searched full:composed (Results 1 – 25 of 87) sorted by relevance
1234
| /Documentation/devicetree/bindings/mailbox/ |
| D | nvidia,tegra186-hsp.yaml | 29 For shared mailboxes, the first cell composed of two fields:
41 For shared mailboxes, the second cell is composed of two fields:
|
| /Documentation/devicetree/bindings/display/ |
| D | amlogic,meson-vpu.yaml | 14 The Amlogic Meson Display controller is composed of several components
49 The VENC is composed of the multiple pixel encoders
|
| D | amlogic,meson-g12a-dw-mipi-dsi.yaml | 14 The Amlogic Meson Synopsys Designware Integration is composed of
|
| D | st,stm32mp25-lvds.yaml | 18 It is composed of three sub blocks:
|
| D | arm,komeda.yaml | 15 to a 4K resolution each. Each pipeline can be composed of up to four
|
| D | allwinner,sun4i-a10-display-engine.yaml | 18 The Allwinner A10 Display pipeline is composed of several components
|
| /Documentation/devicetree/bindings/powerpc/fsl/ |
| D | srio-rmu.txt | 5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
35 Sub-Nodes for RMU: The RMU node is composed of multiple sub-nodes that
|
| /Documentation/driver-api/ |
| D | vfio-pci-device-specific-driver-acceptance.rst | 31 device state composed and consumed, which portions are not otherwise
|
| D | pwrseq.rst | 35 A target is a set of units (composed of the "final" unit and its
|
| /Documentation/admin-guide/perf/ |
| D | qcom_l3_pmu.rst | 6 Centriq SoCs. The L3 cache on these SOCs is composed of multiple slices, shared
|
| D | hisi-pcie-pmu.rst | 134 When counting bandwidth, the data can be composed of certain parts of TLP
143 and "len_mode=3" means the final bandwidth data is composed of both TLP
|
| /Documentation/netlabel/ |
| D | introduction.rst | 15 is composed of three main components, the protocol engines, the communication
|
| /Documentation/userspace-api/media/v4l/ |
| D | dev-touch.rst | 24 For capacitive touch sensing, the touchscreen is composed of an array of
|
| /Documentation/filesystems/ |
| D | efivarfs.rst | 34 Practically the output of each efivar is composed of:
|
| /Documentation/devicetree/bindings/firmware/ |
| D | intel,stratix10-svc.txt | 3 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
|
| /Documentation/ABI/testing/ |
| D | sysfs-platform-asus-laptop | 7 is composed by 4 bits and defined as follow::
|
| D | sysfs-bus-papr-pmem | 44 reported on a new line with each line composed of a
|
| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,padding.yaml | 41 describes GCE client's information that is composed by 4 fields.
|
| /Documentation/devicetree/bindings/bus/ |
| D | st,stm32mp25-rifsc.yaml | 17 The RIFSC (RIF security controller) is composed of three sets of registers,
|
| /Documentation/virt/kvm/s390/ |
| D | s390-pv-boot.rst | 51 * List of Components composed of
|
| /Documentation/gpu/ |
| D | meson.rst | 11 The Amlogic Meson Display controller is composed of several components
|
| /Documentation/admin-guide/device-mapper/ |
| D | persistent-data.rst | 81 The btree is 'hierarchical' in that you can define it to be composed
|
| /Documentation/userspace-api/ |
| D | iommufd.rst | 143 mapped to memory pages, composed of:
161 An io_pagetable is composed of iopt_areas pointing at iopt_pages, along with a
|
| /Documentation/devicetree/bindings/thermal/ |
| D | mediatek,lvts-thermal.yaml | 13 LVTS is a thermal management architecture composed of three subsystems,
|
| /Documentation/devicetree/bindings/sound/ |
| D | apple,mca.yaml | 11 composed of a number of identical clusters which can operate independently
|
1234