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/Documentation/devicetree/bindings/hwmon/
Dntc-thermistor.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 ---
3 $id: http://devicetree.org/schemas/hwmon/ntc-thermistor.yaml#
4 $schema: http://devicetree.org/meta-schemas/core.yaml#
9 - Linus Walleij <linus.walleij@linaro.org>
13 vary in resistance in an often non-linear way in relation to temperature.
16 temperature is non-linear, software drivers most often need to use a look
19 When used in practice, a thermistor is often connected between ground, a
20 pull-up resistor or/and a pull-down resistor and a fixed voltage like this:
22 + e.g. 5V = pull-up voltage (puv)
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/Documentation/devicetree/bindings/iio/amplifiers/
Dadi,hmc425a.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 ADRF5750 2 dB LSB, 4-Bit, Silicon Digital Attenuator, 10 MHz to 60 GHz
16 https://www.analog.com/media/en/technical-documentation/data-sheets/adrf5740.pdf
18 HMC425A 0.5 dB LSB GaAs MMIC 6-BIT DIGITAL POSITIVE CONTROL ATTENUATOR, 2.2 - 8.0 GHz
19 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc425A.pdf
21 HMC540S 1 dB LSB Silicon MMIC 4-Bit Digital Positive Control Attenuator, 0.1 - 8 GHz
22 https://www.analog.com/media/en/technical-documentation/data-sheets/hmc540s.pdf
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/Documentation/hwmon/
Dpcf8591.rst17 - Aurelien Jarno <aurelien@aurel32.net>
18 - valuable contributions by Jan M. Sendler <sendler@sendler.de>,
19 - Jean Delvare <jdelvare@suse.de>
23 -----------
25 The PCF8591 is an 8-bit A/D and D/A converter (4 analog inputs and one
29 The PCF8591 has 4 analog inputs programmable as single-ended or
32 - mode 0 : four single ended inputs
35 - mode 1 : three differential inputs
37 Pins AIN0 to AIN2 are positive differential inputs for channels 0 to 2
39 - mode 2 : single ended and differential mixed
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Dsysfs-interface.rst5 through the sysfs interface. Since lm-sensors 3.0.0, libsensors is
6 completely chip-independent. It assumes that all the kernel drivers
10 This is a major improvement compared to lm-sensors 2.
14 temperature sensor is connected to the CPU, or that the second fan is on
22 For this reason, even if we aim at a chip-independent libsensors, it will
37 Up to lm-sensors 3.0.0, libsensors looks for hardware monitoring attributes
38 in the "physical" device directory. Since lm-sensors 3.0.1, attributes found
61 to cause an alarm) is chip-dependent.
69 ----------------
76 -------------------------------------------------------------------------
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/Documentation/devicetree/bindings/iio/adc/
Dadi,ad7124.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stefan Popa <stefan.popa@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-8.pdf
21 - adi,ad7124-4
22 - adi,ad7124-8
32 clock-names:
34 - const: mclk
40 '#address-cells':
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Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michael Hennerich <michael.hennerich@analog.com>
16 https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
21 - adi,ad7190
22 - adi,ad7192
23 - adi,ad7193
24 - adi,ad7194
25 - adi,ad7195
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Dadi,max11410.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ibrahim Tilki <Ibrahim.Tilki@analog.com>
21 - adi,max11410
30 interrupt-names:
34 - enum: [gpio0, gpio1]
35 - const: gpio1
37 '#address-cells':
40 '#size-cells':
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Dadi,ad7173.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Ceclan Dumitru <dumitru.ceclan@analog.com>
15 The AD717x family offer a complete integrated Sigma-Delta ADC solution which
18 (Factory Automation PLC Input modules). The Sigma-Delta ADC is intended
23 The AD411X family encompasses a series of low power, low noise, 24-bit,
24 sigma-delta analog-to-digital converters that offer a versatile range of
26 fully differential/single-ended and bipolar voltage inputs.
29 https://www.analog.com/media/en/technical-documentation/data-sheets/AD4111.pdf
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Dst,stm32-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
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/Documentation/networking/pse-pd/
Dpse-pi.rst1 .. SPDX-License-Identifier: GPL-2.0
8 blueprint that outlines how one or multiple power sources are connected to the
9 eight-pin modular jack, commonly known as the Ethernet RJ45 port. This
14 ---------------------------
19 - Section "33.2.3 PI pin assignments" covers the pin assignments for PoE
21 - Section "145.2.4 PSE PI" addresses the configuration for PoE systems that
25 -------------------------------
31 two pairs of wires, SPE operates on a simpler model due to its single-pair
33 assignments for power delivery, as described in the PSE PI for multi-pair
37 --------------------
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/Documentation/devicetree/bindings/bus/
Dmoxtet.txt4 - compatible : Should be "cznic,moxtet"
5 - #address-cells : Has to be 1
6 - #size-cells : Has to be 0
7 - spi-cpol : Required inverted clock polarity
8 - spi-cpha : Required shifted clock phase
9 - interrupts : Must contain reference to the shared interrupt line
10 - interrupt-controller : Required
11 - #interrupt-cells : Has to be 1
14 ../spi/spi-bus.txt.
17 - reg : Should be position on the Moxtet bus (how many Moxtet
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/Documentation/devicetree/bindings/display/panel/
Dmantix,mlaf057we51-x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/mantix,mlaf057we51-x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mantix MLAF057WE51-X 5.7" 720x1440 TFT LCD panel
10 - Guido Günther <agx@sigxcpu.org>
13 Mantix MLAF057WE51 X is a 720x1440 TFT LCD panel connected using
14 a MIPI-DSI video interface.
17 - $ref: panel-common.yaml#
22 - mantix,mlaf057we51-x
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/Documentation/ABI/testing/
Dsysfs-bus-iio-timer-stm328 - "reset"
11 - "enable"
14 - "update"
18 - "compare_pulse"
19 The trigger output send a positive pulse
21 - "OC1REF"
23 - "OC2REF"
25 - "OC3REF"
27 - "OC4REF"
32 - "OC5REF"
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Dsysfs-bus-iio3 Contact: linux-iio@vger.kernel.org
11 Contact: linux-iio@vger.kernel.org
25 Contact: linux-iio@vger.kernel.org
31 Contact: linux-iio@vger.kernel.org
38 Contact: linux-iio@vger.kernel.org
44 The contents of the label are free-form, but there are some
51 * "proximity-wifi"
52 * "proximity-lte"
53 * "proximity-wifi-lte"
54 * "proximity-wifi-left"
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/Documentation/devicetree/bindings/iio/proximity/
Dsemtech,sx9310.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Daniel Campello <campello@chromium.org>
16 https://www.semtech.com/products/smart-sensing/sar-sensors/sx9310
19 - $ref: /schemas/iio/iio.yaml#
24 - semtech,sx9310
25 - semtech,sx9311
37 vdd-supply:
40 svdd-supply:
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/Documentation/devicetree/bindings/net/
Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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/Documentation/misc-devices/
Dspear-pcie-gadget.rst1 .. SPDX-License-Identifier: GPL-2.0
37 -----------------------
42 no_of_msi zero if MSI is not enabled by host. A positive value is the
53 ------------------------
61 inta write 1 to assert INTA and 0 to de-assert.
78 Program all PCIe registers in such a way that when this device is connected
83 #mount -t configfs none /Config
109 as BAR0 address then when this device will be connected to a host, it will be
138 To de-assert INTA::
170 # cd -
/Documentation/input/devices/
Datarikbd.rst12 provides a convenient connection point for a mouse and switch-type joysticks.
13 The ikbd processor also maintains a time-of-day clock with one second
18 The ikbd communicates with the main processor over a high speed bi-directional
41 0xF8-0xFB relative mouse position records (lsbs determined by
43 0xFC time-of-day
67 ---------------------------
92 +127...-128 range, the motion is broken into multiple packets.
97 ---------------------------
104 ---------------------
120 ------------------------
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Diforce-protocol.rst7 Home page at `<http://web.archive.org/web/*/http://www.esil.univ-mrs.fr>`_
16 specify force effects to I-Force 2.0 devices. None of this information comes
25 send data to your I-Force device based on what you read in this document.
30 All values are hexadecimal with big-endian encoding (msb on the left). Beware,
31 values inside packets are encoded using little-endian. Bytes whose roles are
35 ------------------------
64 00 X-Axis lsb
65 01 X-Axis msb
66 02 Y-Axis lsb, or gas pedal for a wheel
67 03 Y-Axis msb, or brake pedal for a wheel
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/Documentation/devicetree/bindings/mailbox/
Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
15 external to the various processor subsystems and is connected on an
35 lines can also be routed to different processor sub-systems on DRA7xx as they
43 smaller, and the interrupt output lines are connected directly to various
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
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/Documentation/driver-api/nfc/
Dnfc-hci.rst5 - Author: Eric Lapuyade, Samuel Ortiz
6 - Contact: eric.lapuyade@intel.com, samuel.ortiz@intel.com
9 -------
12 enables easy writing of HCI-based NFC drivers. The HCI layer runs as an NFC Core
17 ---
30 - one for executing commands : nfc_hci_msg_tx_work(). Only one command
32 - one for dispatching received events and commands : nfc_hci_msg_rx_work().
35 --------------------------
40 those gates have pipes connected when the hci device is set up.
41 In case the chip supports pre-opened gates and pseudo-static pipes, the driver
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/Documentation/w1/
Dw1-generic.rst2 Introduction to the 1-wire (w1) subsystem
5 The 1-wire bus is a simple master-slave bus that communicates via a single
14 All w1 slave devices must be connected to a w1 bus master device.
18 - DS9490 usb device
19 - W1-over-GPIO
20 - DS2482 (i2c to w1 bridge)
21 - Emulated devices, such as a RS232 converter, parallel port adapter, etc
25 ------------------------------
29 - sysfs entries for that w1 master are created
30 - the w1 bus is periodically searched for new slave devices
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/Documentation/driver-api/
Dreset.rst1 .. SPDX-License-Identifier: GPL-2.0-only
13 the `consumer driver interface <#consumer-driver-interface>`__ (`API reference
14 <#reset-consumer-api>`__), which allows peripheral drivers to request control
16 <#reset-controller-driver-interface>`__ (`API reference
17 <#reset-controller-driver-api>`__), which is used by drivers for reset
25 --------
39 is self-clearing and can be used to trigger a predetermined pulse on the
71 ---------------------------
92 -------------------------
107 ----------
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Ddpll.rst1 .. SPDX-License-Identifier: GPL-2.0
10 PLL - Phase Locked Loop is an electronic circuit which syntonizes clock
14 DPLL - Digital Phase Locked Loop is an integrated circuit which in
33 connected pins.
51 connected.
82 - ``DPLL_PIN_STATE_CONNECTED`` - the pin is used to drive dpll device
83 - ``DPLL_PIN_STATE_DISCONNECTED`` - the pin is not used to drive dpll
89 - ``DPLL_PIN_STATE_SELECTABLE`` - the pin shall be considered as valid
91 - ``DPLL_PIN_STATE_DISCONNECTED`` - the pin shall be not considered as
104 1) Set on a pin - the configuration affects all dpll devices pin is
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/Documentation/sound/designs/
Dseq-oss.rst15 What this does - it provides the emulation of the OSS sequencer, access
53 However, each MIDI device is exclusive - that is, if a MIDI device
57 * Real-time event processing:
60 ioctl. To switch to real-time mode, send ABSTIME 0 event. The followed
61 events will be processed in real-time without queued. To switch off the
62 real-time mode, send RELTIME 0 event.
74 Run configure script with both sequencer support (``--with-sequencer=yes``)
75 and OSS emulation (``--with-oss=yes``) options. A module ``snd-seq-oss.o``
82 already connected to the sequencer. Once after that, the creation and deletion
102 midi 0: [Emu8000 Port-0] ALSA port 65:0
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