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/Documentation/devicetree/bindings/leds/
Dleds-bcm6328.yaml16 controller), which can either be controlled by software (exporting the 74x164
20 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
22 controlled, so the only chance to keep them working is by using this driver.
25 should be controlled by a hardware signal instead of the MODE register value,
30 controlled you are still able to make it blink or light it up if it isn't,
32 reason, hardware controlled LEDs aren't registered as LED class devices.
81 brcm,hardware-controlled:
83 description: Makes this LED hardware controlled.
149 brcm,hardware-controlled;
154 brcm,hardware-controlled;
[all …]
Dleds-lm3697.txt21 - reg : 0 - LED is Controlled by bank A
22 1 - LED is Controlled by bank B
39 HVLED string 1 and 3 are controlled by control bank A and HVLED 2 string is
40 controlled by control bank B.
Dleds-lm3532.txt53 - reg : Indicates control bank the LED string is controlled by
55 - ti,led-mode : Defines if the LED strings are manually controlled or
56 if the LED strings are controlled by the ALS.
57 0x00 - LED strings are I2C controlled via full scale
59 0x01 - LED strings are ALS controlled
Dleds-lm36274.txt6 the I2C bus and/or controlled via a logic level PWM input from 60 uA to 30 mA.
31 HVLED string 1 and 3 are controlled by control bank A and HVLED 2 string is
32 controlled by control bank B.
/Documentation/devicetree/bindings/regulator/
Dmediatek,mt6873-dvfsrc-regulator.yaml7 title: MediaTek DVFSRC-controlled Regulators
11 are controlled with votes to the DVFSRC hardware.
25 description: DVFSRC-controlled SoC Vcore regulator
30 description: DVFSRC-controlled System Control Processor regulator
Das3722-regulator.txt36 1: Rail is controlled by ENABLE1 input pin.
37 2: Rail is controlled by ENABLE2 input pin.
38 3: Rail is controlled by ENABLE3 input pin.
Dtps65090.txt18 If DCDCs are externally controlled then this property should be there.
20 If DCDCs are externally controlled and if it is from GPIO then GPIO
21 number should be provided. If it is externally controlled and no GPIO
/Documentation/devicetree/bindings/pwm/
Dgoogle,cros-ec-pwm.yaml7 title: PWM controlled by ChromeOS EC
15 (EC) and controlled via a host-command interface.
25 - description: PWM controlled using EC_PWM_TYPE_GENERIC channels.
28 - description: PWM controlled using CROS_EC_PWM_DT_<...> types.
/Documentation/devicetree/bindings/dma/
Dqcom,bam-dma.yaml52 Indicates supported number of DMA channels in a remotely controlled bam.
54 qcom,controlled-remotely:
57 Indicates that the bam is controlled by remote processor i.e. execution
72 controlled bam.
94 - qcom,controlled-remotely
/Documentation/leds/
Dleds-lm3556.rst26 LM3556 Flash can be controlled through /sys/class/leds/flash/brightness file
29 ON / OFF will be controlled by STROBE pin.
54 LM3556 torch can be controlled through /sys/class/leds/torch/brightness file.
56 and ON / OFF will be controlled by TORCH pin.
98 Indicator brightness can be controlled through
/Documentation/hwmon/
Dnzxt-smart2.rst31 be controlled (`pwm*` changes will be ignored). It is necessary because the
49 pwm[1-3] Controls fan speed: PWM duty cycle for PWM-controlled
54 pwm[1-3]_enable 1 if the fan can be controlled by writing to the
58 pwm[1-3]_mode Read-only, 1 for PWM-controlled fans, 0 for other fans
Damc6821.rst24 The pwm can be controlled either from software or automatically.
55 pwm1_enable rw regulator mode, 1=open loop, 2=fan controlled
56 by remote temperature, 3=fan controlled by
59 4=fan controlled by target rpm set with
Dasus_rog_ryujin.rst20 controlled from the device. If not connected, the fan-related sensors will
25 be controlled through userspace tools.
/Documentation/fault-injection/
Dnotifier-error-inject.rst16 This feature is controlled through debugfs interface
35 This feature is controlled through debugfs interface
53 This feature is controlled through debugfs interface
66 This feature is controlled through debugfs interface
/Documentation/devicetree/bindings/leds/backlight/
Dkinetic,ktd2801.yaml13 The Kinetic Technologies KTD2801 is a LED backlight driver controlled
14 by a single GPIO line. The driver can be controlled with a PWM signal
Dmps,mp3309c.yaml18 - PWM controlled mode (optional)
34 description: if present, the backlight is controlled in PWM mode.
/Documentation/devicetree/bindings/media/i2c/
Ddongwoon,dw9768.yaml15 with 100 mA output current sink capability. VCM current is controlled with
16 a linear mode driver. The DAC is controlled via a 2-wire (I2C-compatible)
51 Number of AAC Timing count that controlled by one 6-bit period of
/Documentation/devicetree/bindings/thermal/
Drockchip-thermal.yaml61 description: The hardware-controlled shutdown temperature value.
65 description: The hardware-controlled shutdown mode 0:CRU 1:GPIO.
70 description: The hardware-controlled active polarity 0:LOW 1:HIGH.
/Documentation/devicetree/bindings/display/
Delgin,jg10309-01.yaml7 title: Elgin JG10309-01 SPI-controlled display
13 The Elgin JG10309-01 SPI-controlled display is used on the RV1108-Elgin-r1
/Documentation/devicetree/bindings/sound/
Dcirrus,cs35l45.yaml105 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
106 2 = Pin acts as MDSYNC, direction controlled by MDSYNC
110 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
118 1 = Pin acts as a GPIO, direction controlled by 'gpio-dir'
Dti,tlv320adc3xxx.yaml61 When ADC3XXX_GPIO_GPO is selected, the pin may be controlled via the
79 When ADC3XXX_GPIO_GPO is selected, the pin may be controlled via the
88 When set, the MICBIAS1 pin may be controlled via the GPIO framework,
98 When set, the MICBIAS2 pin may be controlled via the GPIO framework,
/Documentation/devicetree/bindings/iio/filter/
Dadi,admv8818.yaml15 The device features four independently controlled high-pass
16 filters (HPFs) and four independently controlled low-pass filters
/Documentation/devicetree/bindings/clock/
Dmaxim,max77686.txt10 The MAX77686 contains three 32.768khz clock outputs that can be controlled
15 The MAX77802 contains two 32.768khz clock outputs that can be controlled
19 The MAX77686 contains one 32.768khz clock outputs that can be controlled
/Documentation/devicetree/bindings/pci/
Dqcom,pcie-common.yaml74 description: GPIO controlled connection to PERST# signal
78 description: GPIO controlled connection to WAKE# signal
/Documentation/devicetree/bindings/interrupt-controller/
Dst,stih407-irq-syscfg.yaml7 title: STMicroelectronics STi System Configuration Controlled IRQs
14 Management), and PL310 L2 Cache IRQs are controlled using System

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