Searched +full:controller +full:- +full:dependent (Results 1 – 25 of 90) sorted by relevance
1234
| /Documentation/devicetree/bindings/display/ |
| D | solomon,ssd-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/solomon,ssd-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Javier Martinez Canillas <javierm@redhat.com>
16 reset-gpios:
20 dc-gpios:
22 GPIO connected to the controller's D/C# (Data/Command) pin,
23 that is needed for 4-wire SPI to tell the controller if the
30 Height in pixel of the screen driven by the controller.
[all …]
|
| D | solomon,ssd1307fb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Solomon SSD1307 OLED Controller Framebuffer
10 - Maxime Ripard <mripard@kernel.org>
11 - Javier Martinez Canillas <javierm@redhat.com>
17 - enum:
18 - solomon,ssd1305fb-i2c
19 - solomon,ssd1306fb-i2c
20 - solomon,ssd1307fb-i2c
[all …]
|
| D | renesas,shmobile-lcdc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/renesas,shmobile-lcdc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas SH-Mobile LCD Controller (LCDC)
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - renesas,r8a7740-lcdc # R-Mobile A1
17 - renesas,sh73a0-lcdc # SH-Mobile AG5
30 Some of the optional clocks are model-dependent (e.g. "video" (a.k.a.
[all …]
|
| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | touchscreen.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Torokhov <dmitry.torokhov@gmail.com>
20 touchscreen-min-x:
25 touchscreen-min-y:
30 touchscreen-size-x:
34 touchscreen-size-y:
38 touchscreen-max-pressure:
39 description: maximum reported pressure (arbitrary range dependent on the controller)
[all …]
|
| /Documentation/driver-api/memory-devices/ |
| D | ti-emif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 TI EMIF SDRAM Controller Driver
29 SoCs. EMIF is an SDRAM controller that, based on its revision,
32 functions of the driver includes re-configuring AC timing
38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
42 - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
43 - Custom configurations: customizable policy options through
45 - IP revision
46 - PHY type
[all …]
|
| D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 GPMC (General Purpose Memory Controller)
7 GPMC is an unified memory controller dedicated to interfacing external
14 * Pseudo-SRAM devices
85 4. read async non-muxed
107 6. read sync non-muxed
131 8. write async non-muxed
157 10. write sync non-muxed
172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc timings, a reason that
|
| /Documentation/devicetree/bindings/pci/ |
| D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DWC PCIe RP/EP controller
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
14 Generic Synopsys DesignWare PCIe Root Port and Endpoint controller
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
[all …]
|
| /Documentation/devicetree/bindings/dma/stm32/ |
| D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA Controller
10 The STM32 DMA is a general-purpose direct memory access controller capable of
12 DMA clients connected to the STM32 DMA controller must use the format
13 described in the dma.txt file, using a four-cell specifier for each
14 channel: a phandle to the DMA controller plus the following four integer cells:
18 dependent:
[all …]
|
| /Documentation/devicetree/bindings/media/i2c/ |
| D | mipi-ccs.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2014--2020 Intel Corporation
4 ---
5 $id: http://devicetree.org/schemas/media/i2c/mipi-ccs.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sakari Ailus <sakari.ailus@linux.intel.com>
17 <URL:https://www.mipi.org/specifications/camera-command-set>.
24 Documentation/devicetree/bindings/media/video-interfaces.txt .
29 - items:
30 - const: mipi-ccs-1.1
[all …]
|
| /Documentation/devicetree/bindings/usb/ |
| D | chipidea,usb2-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/chipidea,usb2-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: USB2 ChipIdea USB controller Common Properties
10 - Xu Yang <xu.yang_2@nxp.com>
25 clock-names:
31 power-domains:
37 reset-names:
40 "#reset-cells":
[all …]
|
| /Documentation/devicetree/bindings/reset/ |
| D | st,stih407-powerdown.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Peripheral Powerdown Reset Controller
10 - Srinivas Kandagatla <srinivas.kandagatla@st.com>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip peripheral controllers such as USB and SATA, using
16 registers. These have been grouped together into a single reset controller
19 The actual action taken when powerdown is asserted is hardware dependent.
[all …]
|
| D | st,stih407-picophyreset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STi family Sysconfig Picophy SoftReset Controller
10 - Peter Griffin <peter.griffin@linaro.org>
13 This binding describes a reset controller device that is used to enable and
14 disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
17 The actual action taken when softreset is asserted is hardware dependent.
24 const: st,stih407-picophyreset
[all …]
|
| D | st,sti-softreset.txt | 1 STMicroelectronics STi family Sysconfig Peripheral SoftReset Controller
4 This binding describes a reset controller device that is used to enable and
5 disable on-chip peripheral controllers such as USB and SATA, using
9 The actual action taken when softreset is asserted is hardware dependent.
15 controller binding usage.
18 - compatible: Should be "st,stih407-softreset";
19 - #reset-cells: 1, see below
23 softreset: softreset-controller {
24 #reset-cells = <1>;
25 compatible = "st,stih407-softreset";
[all …]
|
| D | img,pistachio-reset.txt | 1 Pistachio Reset Controller
4 This binding describes a reset controller device that is used to enable and
8 The actual action taken when soft reset is asserted is hardware dependent.
14 for common reset controller binding usage.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
[all …]
|
| /Documentation/devicetree/bindings/dma/ |
| D | atmel-dma.txt | 1 * Atmel Direct Memory Access Controller (DMA)
4 - compatible: Should be "atmel,<chip>-dma".
5 - reg: Should contain DMA registers location and length.
6 - interrupts: Should contain DMA interrupt.
7 - #dma-cells: Must be <2>, used to represent the number of integer cells in
13 compatible = "atmel,at91sam9g45-dma";
16 #dma-cells = <2>;
19 DMA clients connected to the Atmel DMA controller must use the format
20 described in the dma.txt file, using a three-cell specifier for each channel:
24 1. A phandle pointing to the DMA controller.
[all …]
|
| D | socionext,uniphier-mio-dmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier Media IO DMA controller
14 - Masahiro Yamada <yamada.masahiro@socionext.com>
17 - $ref: dma-controller.yaml#
21 const: socionext,uniphier-mio-dmac
29 The number of interrupt lines is SoC-dependent.
37 '#dma-cells':
[all …]
|
| /Documentation/devicetree/bindings/media/ |
| D | nxp,imx8-isi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
|
| /Documentation/devicetree/bindings/leds/ |
| D | leds-spi-byte.txt | 4 - one LED is controlled by a single byte on MOSI
5 - the value of the byte gives the brightness between two values (lowest to
7 - no return value is necessary (no MISO signal)
9 The value for lowest and highest brightness is dependent on the device and
16 configured in a sub-node in the device node.
19 - compatible: should be one of
20 * "ubnt,acb-spi-led" microcontroller (SONiX 8F26E611LA) based device
23 Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt
26 LED sub-node properties:
27 - label:
[all …]
|
| /Documentation/devicetree/bindings/mmc/ |
| D | aspeed,sdhci.yaml | 1 # SPDX-License-Identifier: GPL-2.0-or-later
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: ASPEED SD/SDIO/MMC Controller
11 - Andrew Jeffery <andrew@aj.id.au>
12 - Ryan Chen <ryanchen.aspeed@gmail.com>
15 The ASPEED SD/SDIO/eMMC controller exposes two slots implementing the SDIO
20 the slots are dependent on the common configuration area, they are described
26 - aspeed,ast2400-sd-controller
27 - aspeed,ast2500-sd-controller
[all …]
|
| /Documentation/admin-guide/pm/ |
| D | suspend-flows.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 At least one global system-wide transition needs to be carried out for the
14 :doc:`sleep states <sleep-states>`. Hibernation requires more than one
16 referred to as *system-wide suspend* (or simply *system suspend*) states, need
27 significant differences between the :ref:`suspend-to-idle <s2idle>` code flows
28 and the code flows related to the :ref:`suspend-to-RAM <s2ram>` and
31 The :ref:`suspend-to-RAM <s2ram>` and :ref:`standby <standby>` sleep states
33 boils down to the platform-specific actions carried out by the suspend and
37 *platform-dependent suspend* states in what follows.
42 Suspend-to-idle Suspend Code Flow
[all …]
|
| /Documentation/infiniband/ |
| D | opa_vnic.rst | 2 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC)
5 Intel Omni-Path (OPA) Virtual Network Interface Controller (VNIC) feature
6 supports Ethernet functionality over Omni-Path fabric by encapsulating
11 The patterns of exchanges of Omni-Path encapsulated Ethernet packets
12 involves one or more virtual Ethernet switches overlaid on the Omni-Path
13 fabric topology. A subset of HFI nodes on the Omni-Path fabric are
26 +-------------------+
30 +-------------------+
35 +-----------------------------+ +------------------------------+
37 | +---------+ +---------+ | | +---------+ +---------+ |
[all …]
|
| /Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-mux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
14 uniquely in a device dependent manner. The nodes for an i2c bus
18 i2c child busses and other child nodes, the 'i2c-mux' subnode can be used for
19 populating the i2c child busses. If an 'i2c-mux' subnode is present, only
24 pattern: '^(i2c-?)?mux'
26 '#address-cells':
[all …]
|
| /Documentation/devicetree/bindings/soc/loongson/ |
| D | loongson,ls2k-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
[all …]
|
| /Documentation/devicetree/bindings/net/ |
| D | sti-dwmac.txt | 1 STMicroelectronics SoC DWMAC glue layer controller
10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
23 retimeing tx lines. This is totally board dependent and can take one of the
26 - sti-ethclk: this is the phy clock.
[all …]
|
| /Documentation/userspace-api/media/dvb/ |
| D | legacy_dvb_decoder_api.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later OR GPL-2.0
15 the :ref:`legacy_dvb_decoder_formats` used in such digital TV-broadcastsystems.
27 Pipelines should be set up using the :ref:`Media Controller API<media_controller>`.
40 Because of that fact the only supported data formats are ISO/IEC 13818-1
44 Timestamps are always MPEG PTS as defined in ITU T-REC-H.222.0 /
45 ISO/IEC 13818-1, if not otherwise noted.
48 Both variants are commonly accepted for playback, but it may be driver dependent.
|
1234