Searched full:controlling (Results 1 – 25 of 231) sorted by relevance
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-i2c-devices-lm3533 | 6 Set the controlling backlight device for high-voltage current
14 Set the controlling led device for low-voltage current sink
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| /Documentation/devicetree/bindings/phy/ |
| D | allwinner,sun8i-h3-usb-phy.yaml | 82 description: Regulator controlling USB OTG VBUS
85 description: Regulator controlling USB1 Host controller
88 description: Regulator controlling USB2 Host controller
91 description: Regulator controlling USB3 Host controller
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| D | allwinner,sun8i-r40-usb-phy.yaml | 70 description: Regulator controlling USB OTG VBUS
73 description: Regulator controlling USB1 Host controller
76 description: Regulator controlling USB2 Host controller
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| D | allwinner,sun4i-a10-usb-phy.yaml | 65 description: Regulator controlling USB OTG VBUS
68 description: Regulator controlling USB1 Host controller
71 description: Regulator controlling USB2 Host controller
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| D | allwinner,sun6i-a31-usb-phy.yaml | 68 description: Regulator controlling USB OTG VBUS
71 description: Regulator controlling USB1 Host controller
74 description: Regulator controlling USB2 Host controller
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| D | allwinner,sun8i-a83t-usb-phy.yaml | 70 description: Regulator controlling USB OTG VBUS
73 description: Regulator controlling USB1 Host controller
76 description: Regulator controlling USB2 Host controller
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| D | allwinner,sun5i-a13-usb-phy.yaml | 59 description: Regulator controlling USB OTG VBUS
62 description: Regulator controlling USB1 Host controller
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| D | allwinner,sun50i-h6-usb-phy.yaml | 64 description: Regulator controlling USB OTG VBUS
67 description: Regulator controlling USB3 Host controller
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| D | allwinner,sun8i-a23-usb-phy.yaml | 64 description: Regulator controlling USB OTG VBUS
67 description: Regulator controlling USB1 Host controller
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| D | allwinner,sun50i-a64-usb-phy.yaml | 66 description: Regulator controlling USB OTG VBUS
69 description: Regulator controlling USB1 Host controller
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| D | hix5hd2-phy.txt | 13 register of controlling sata power supply.
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| /Documentation/devicetree/bindings/input/touchscreen/ |
| D | hideep.txt | 9 - vdd-supply : It is the controller supply for controlling
11 - vid-supply : It is the controller supply for controlling
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| /Documentation/devicetree/bindings/net/ |
| D | fsl,cpm-mdio.yaml | 28 description: pin of port C controlling mdio data
32 description: pin of port C controlling mdio clock
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| /Documentation/hwmon/ |
| D | sch5627.rst | 38 Controlling fan speed
41 The SCH5627 allows for partially controlling the fan speed. If a temperature
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| /Documentation/devicetree/bindings/regulator/ |
| D | ti,tps62360.yaml | 37 GPIO for controlling VSEL0 line. If this property
44 GPIO for controlling VSEL1 line. If this property
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| /Documentation/devicetree/bindings/sound/ |
| D | uda1334.txt | 3 This device uses simple GPIO pins for controlling codec settings.
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| /Documentation/devicetree/bindings/power/reset/ |
| D | qnap-poweroff.txt | 3 QNAP NAS devices have a microcontroller controlling the main power
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| /Documentation/devicetree/bindings/leds/ |
| D | register-bit-led.yaml | 38 bit mask for the bit controlling this LED in the register
48 register offset to the register controlling this LED
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| /Documentation/userspace-api/media/rc/ |
| D | rc-intro.rst | 23 controlling the RC-specific attributes via
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| /Documentation/devicetree/bindings/net/ieee802154/ |
| D | ca8210.txt | 5 - reg: Controlling chip select
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| /Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 17 modes, with a single hardware switch controlling both the endianness
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| /Documentation/devicetree/bindings/clock/ |
| D | brcm,bcm2835-aux-clock.txt | 7 area controlling clock gating to the peripherals, and providing an IRQ
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | dongwoon,dw9807-vcm.yaml | 15 controlling voice coil lenses.
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| /Documentation/devicetree/bindings/reset/ |
| D | brcm,bcm7216-pcie-sata-rescal.yaml | 11 which is responsible for controlling the reset of the SATA and PCIe0/1
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| /Documentation/devicetree/bindings/clock/ti/ |
| D | fapll.txt | 14 - reg : address and length of the register set for controlling the FAPLL.
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