Home
last modified time | relevance | path

Searched full:coreclk (Results 1 – 8 of 8) sorted by relevance

/Documentation/devicetree/bindings/timer/
Dmarvell,armada-370-xp-timer.txt33 clocks = <&coreclk 2>;
42 clocks = <&coreclk 2>, <&refclk>;
Dmrvl,mmp-timer.yaml43 clocks = <&coreclk 2>;
/Documentation/devicetree/bindings/watchdog/
Dmoxa,moxart-watchdog.txt14 clocks = <&coreclk>;
/Documentation/devicetree/bindings/clock/
Dmvebu-cpu-clock.txt16 clocks = <&coreclk 1>;
Dfsl,qoriq-clock.yaml94 5 coreclk must be 0
105 A second input clock, called "coreclk", may be provided if
113 - const: coreclk
/Documentation/devicetree/bindings/dma/
Dmv-xor.txt32 clocks = <&coreclk 0>;
/Documentation/devicetree/bindings/gpio/
Dgpio-mvebu.yaml145 clocks = <&coreclk 0>;
/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml164 coreclk-mux@[a-f0-9]+$:
169 name "coreclk-mux".