Searched +full:cpu +full:- +full:capacity (Results 1 – 25 of 41) sorted by relevance
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| /Documentation/scheduler/ |
| D | sched-capacity.rst | 2 Capacity Aware Scheduling
5 1. CPU Capacity
9 ----------------
13 different performance characteristics - on such platforms, not all CPUs can be
16 CPU capacity is a measure of the performance a CPU can reach, normalized against
17 the most performant CPU in the system. Heterogeneous systems are also called
18 asymmetric CPU capacity systems, as they contain CPUs of different capacities.
20 Disparity in maximum attainable performance (IOW in maximum CPU capacity) stems
23 - not all CPUs may have the same microarchitecture (µarch).
24 - with Dynamic Voltage and Frequency Scaling (DVFS), not all CPUs may be
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| D | sched-energy.rst | 6 ---------------
10 Energy Model (EM) of the CPUs to select an energy efficient CPU for each task,
17 /!\ EAS does not support platforms with symmetric CPU topologies /!\
19 EAS operates only on heterogeneous CPU topologies (such as Arm big.LITTLE)
25 please refer to its documentation (see Documentation/power/energy-model.rst).
29 -----------------------------
32 - energy = [joule] (resource like a battery on powered devices)
33 - power = energy/time = [joule/second] = [watt]
39 --------------------
45 -----------
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| D | schedutil.rst | 7 All this assumes a linear relation between frequency and work capacity,
15 individual tasks to task-group slices to CPU runqueues. As the basis for this
31 Note that blocked tasks still contribute to the aggregates (task-group slices
32 and CPU runqueues), which reflects their expected contribution when they
36 reflects the time an entity spends on the CPU, while 'runnable' reflects the
38 two metrics are the same, but once there is contention for the CPU 'running'
39 will decrease to reflect the fraction of time each task spends on the CPU
45 Frequency / CPU Invariance
48 Because consuming the CPU for 50% at 1GHz is not the same as consuming the CPU
49 for 50% at 2GHz, nor is running 50% on a LITTLE CPU the same as running 50% on
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| D | sched-bwc.rst | 6 This document only discusses CPU bandwidth control for SCHED_NORMAL.
7 The SCHED_RT case is covered in Documentation/scheduler/sched-rt-group.rst
10 specification of the maximum CPU bandwidth available to a group or hierarchy.
14 microseconds of CPU time. That quota is assigned to per-cpu run queues in
22 is transferred to cpu-local "silos" on a demand basis. The amount transferred
26 -------------
30 Traditional (UP-EDF) bandwidth control is something like:
64 there many cgroups or CPU is under utilized, the interference is
66 https://lore.kernel.org/lkml/5371BD36-55AE-4F71-B9D7-B86DC32E3D2B@linux.alibaba.com/
69 ----------
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| D | sched-util-clamp.rst | 1 .. SPDX-License-Identifier: GPL-2.0
18 used, util clamp will influence the CPU frequency selection as well.
57 foreground, top-app, etc. Util clamp can be used to constrain how much
60 the ones belonging to the currently active app (top-app group). Beside this
65 1. The big cores are free to run top-app tasks immediately. top-app
69 are CPU intensive tasks.
73 CPUs with capacity < 1024
76 CPUs with capacity = 1024
106 Note that by design RT tasks don't have per-task PELT signal and must always
114 See :ref:`section 3.4 <uclamp-default-values>` for default values and
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| /Documentation/devicetree/bindings/cpu/ |
| D | cpu-capacity.txt | 2 CPU capacity bindings
6 1 - Introduction
15 2 - CPU capacity definition
18 CPU capacity is a number that provides the scheduler information about CPUs
19 heterogeneity. Such heterogeneity can come from micro-architectural differences
23 capture a first-order approximation of the relative performance of CPUs.
25 CPU capacities are obtained by running a suitable benchmark. This binding makes
27 final capacity should, however, be:
29 * A "single-threaded" or CPU affine benchmark
30 * Divided by the running frequency of the CPU executing the benchmark
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| /Documentation/translations/zh_CN/scheduler/ |
| D | sched-capacity.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/scheduler/sched-capacity.rst
22 --------
27 我们引入CPU算力（capacity）的概念来测量每个CPU能达到的性能，它的值相对系统中性能最强的CPU
32 - 不是所有CPU的微架构都相同。
33 - 在动态电压频率升降（Dynamic Voltage and Frequency Scaling，DVFS）框架中，不是所有的CPU都
34 能达到一样高的操作性能值（Operating Performance Points，OPP。译注，也就是“频率-电压”对）。
42 capacity(cpu) = work_per_hz(cpu) * max_freq(cpu)
45 --------------
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| D | schedutil.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
58 r_dvfs := -----
62 ARMv8.4-AMU）来计算这一比率。具体到Intel，我们使用::
65 f_cur := ----- * P0
68 4C-turbo; 如果可用并且使能了turbo
69 f_max := { 1C-turbo; 如果使能了turbo
73 r_dvfs := min( 1, ----- )
87 - kernel/sched/pelt.h:update_rq_clock_pelt()
88 - arch/x86/kernel/smpboot.c:"APERF/MPERF frequency ratio computation."
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| D | sched-energy.rst | 1 .. SPDX-License-Identifier: GPL-2.0
2 .. include:: ../disclaimer-zh_CN.rst
4 :Original: Documentation/scheduler/sched-energy.rst
15 -------
30 它提供的内容，请参考其文档（见Documentation/power/energy-model.rst）。
34 -------------
37 - 能量 = [焦耳] （比如供电设备上的电池提供的资源）
38 - 功率 = 能量/时间 = [焦耳/秒] = [瓦特]
43 ----------------
49 -----------
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| /Documentation/devicetree/bindings/riscv/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V CPUs
10 - Paul Walmsley <paul.walmsley@sifive.com>
11 - Palmer Dabbelt <palmer@sifive.com>
12 - Conor Dooley <conor@kernel.org>
15 This document uses some terminology common to the RISC-V community
19 mandated by the RISC-V ISA: a PC and some registers. This
27 - $ref: /schemas/cpu.yaml#
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| /Documentation/devicetree/bindings/opp/ |
| D | opp-v2-kryo-cpu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
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| /Documentation/devicetree/bindings/thermal/ |
| D | thermal-idle.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-idle.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Daniel Lezcano <daniel.lezcano@linaro.org>
22 const: thermal-idle
24 A thermal-idle node describes the idle cooling device properties to
27 '#cooling-cells':
31 the cooling-maps reference. The first cell is the minimum cooling state
34 duration-us:
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| D | thermal-cooling-devices.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
4 ---
5 $id: http://devicetree.org/schemas/thermal/thermal-cooling-devices.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Amit Kucheria <amitk@kernel.org>
20 - thermal-sensor: device that measures temperature, has SoC-specific bindings
21 - cooling-device: device used to dissipate heat either passively or actively
22 - thermal-zones: a container of the following node types used to describe all
28 - Passive cooling: by means of regulating device performance. A typical
29 passive cooling mechanism is a CPU that has dynamic voltage and frequency
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| /Documentation/admin-guide/pm/ |
| D | cpufreq.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 CPU Performance Scaling
15 The Concept of CPU Performance Scaling
20 Operating Performance Points or P-states (in ACPI terminology). As a rule,
22 can be retired by the CPU over a unit of time, but also the higher the clock
24 time (or the more power is drawn) by the CPU in the given P-state. Therefore
25 there is a natural tradeoff between the CPU capacity (the number of instructions
26 that can be executed over a unit of time) and the power drawn by the CPU.
29 as possible and then there is no reason to use any P-states different from the
30 highest one (i.e. the highest-performance frequency/voltage configuration
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| /Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
15 defining properties for every cpu.
17 Bindings for CPU nodes follow the Devicetree Specification, available from:
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
34 cpus and cpu node bindings definition
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| /Documentation/bpf/ |
| D | map_hash.rst | 1 .. SPDX-License-Identifier: GPL-2.0-only
3 .. Copyright (C) 2022-2023 Isovalent, Inc.
10 - ``BPF_MAP_TYPE_HASH`` was introduced in kernel version 3.19
11 - ``BPF_MAP_TYPE_PERCPU_HASH`` was introduced in version 4.6
12 - Both ``BPF_MAP_TYPE_LRU_HASH`` and ``BPF_MAP_TYPE_LRU_PERCPU_HASH``
20 to the max_entries limit that you specify. Hash maps use pre-allocation
22 used to disable pre-allocation when it is too memory expensive.
25 CPU. The per-cpu values are stored internally in an array.
30 table reaches capacity. An LRU hash maintains an internal LRU list that
32 shared across CPUs but it is possible to request a per CPU LRU list with
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| /Documentation/core-api/ |
| D | circular-buffers.rst | 12 (1) Convenience functions for determining information about power-of-2 sized
27 (*) Measuring power-of-2 buffers.
30 - The producer.
31 - The consumer.
41 (1) A 'head' index - the point at which the producer inserts items into the
44 (2) A 'tail' index - the point at which the consumer finds the next item in
58 than 1 if multiple items or variable-sized items are to be included in the
63 Measuring power-of-2 buffers
66 Calculation of the occupancy or the remaining capacity of an arbitrarily sized
68 modulus (divide) instruction. However, if the buffer is of a power-of-2 size,
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| D | workqueue.rst | 32 worker thread per CPU and a single threaded (ST) wq had one worker
33 thread system-wide. A single MT wq needed to keep around the same
35 wq users over the years and with the number of CPU cores continuously
42 worker pool. An MT wq could provide only one execution context per CPU
60 * Use per-CPU unified worker pools shared by all wq to provide
85 worker-pools.
87 The cmwq design differentiates between the user-facing workqueues that
89 which manages worker-pools and processes the queued work items.
91 There are two worker-pools, one for normal work items and the other
92 for high priority ones, for each possible CPU and some extra
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| /Documentation/ABI/testing/ |
| D | sysfs-bus-dax | 16 device. Specified in the format <start>-<end>.
59 backing device for this dax device, emit the CPU node
67 (RO) The target-node attribute is the Linux numa-node that a
68 device-dax instance may create when it is online. Prior to
70 closest online cpu node which is the typical expectation of a
74 What: $(readlink -f /sys/bus/dax/devices/daxX.Y)/../dax_region/available_size
80 capacity. This only applies to volatile hmem devices, not pmem
84 What: $(readlink -f /sys/bus/dax/devices/daxX.Y)/../dax_region/size
92 What: $(readlink -f /sys/bus/dax/devices/daxX.Y)/../dax_region/align
103 What: $(readlink -f /sys/bus/dax/devices/daxX.Y)/../dax_region/seed
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| D | sysfs-bus-cxl | 4 Contact: linux-cxl@vger.kernel.org
14 Contact: linux-cxl@vger.kernel.org
17 Memory Device Output Payload in the CXL-2.0
24 Contact: linux-cxl@vger.kernel.org
26 (RO) "Volatile Only Capacity" as bytes. Represents the
28 Payload in the CXL-2.0 specification.
34 Contact: linux-cxl@vger.kernel.org
40 class-ids can be compared against a similar "qos_class"
42 that the endpoints map their local memory-class to a
45 side-effects that may result. First class-id is displayed.
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| D | sysfs-devices-system-cpu | 1 What: /sys/devices/system/cpu/
2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
5 A collection of both global and individual CPU attributes
7 Individual CPU attributes are contained in subdirectories
8 named by the kernel's logical CPU number, e.g.:
10 /sys/devices/system/cpu/cpuX/
12 What: /sys/devices/system/cpu/kernel_max
13 /sys/devices/system/cpu/offline
14 /sys/devices/system/cpu/online
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| /Documentation/gpu/ |
| D | drm-usage-stats.rst | 1 .. _drm-client-usage-stats:
8 `fops->show_fdinfo()` as part of the driver specific file operations registered
22 - File shall contain one key value pair per one line of text.
23 - Colon character (`:`) must be used to delimit keys and values.
24 - All keys shall be prefixed with `drm-`.
25 - Whitespace between the delimiter and first non-whitespace character shall be
27 - Keys are not allowed to contain whitespace characters.
28 - Numerical key value pairs can end with optional unit string.
29 - Data type of the value is fixed as defined in the specification.
32 ---------
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| /Documentation/scsi/ |
| D | aha152x.rst | 1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
17 error handling code in 2.3, produced less cpu load (much
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
42 - DAUTOCONF
43 use configuration the controller reports (AHA-152x only)
45 - DSKIP_BIOSTEST
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| /Documentation/admin-guide/device-mapper/ |
| D | dm-zoned.rst | 2 dm-zoned
5 The dm-zoned device mapper target exposes a zoned block device (ZBC and
7 pattern constraints. In effect, it implements a drive-managed zoned
10 host-managed zoned block devices and can mitigate the potential
11 device-side performance degradation due to excessive random writes on
12 host-aware zoned block devices.
21 http://www.t13.org/Documents/UploadedDocuments/docs2015/di537r05-Zoned_Device_ATA_Command_Set_ZAC.p…
23 The dm-zoned implementation is simple and minimizes system overhead (CPU
24 and memory usage as well as storage capacity loss). For a 10TB
25 host-managed disk with 256 MB zones, dm-zoned memory usage per disk
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| /Documentation/driver-api/iio/ |
| D | buffers.rst | 13 :file:`/dev/iio:device{X}` character device node, thus reducing the CPU load.
21 * :file:`length`, the total number of data samples (capacity) that can be
52 For example, a driver for a 3-axis accelerometer with 12 bit resolution where
53 data is stored in two 8-bits registers as follows::
56 +---+---+---+---+---+---+---+---+
58 +---+---+---+---+---+---+---+---+
61 +---+---+---+---+---+---+---+---+
63 +---+---+---+---+---+---+---+---+
118 Setting **scan_index** to -1 can be used to indicate that the specific channel
124 .. kernel-doc:: include/linux/iio/buffer.h
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