Searched full:crg_ctrl (Results 1 – 9 of 9) sorted by relevance
| /Documentation/devicetree/bindings/phy/ |
| D | hisilicon,phy-hi3670-pcie.yaml | 72 clocks = <&crg_ctrl HI3670_CLK_GATE_PCIEPHY_REF>,
73 <&crg_ctrl HI3670_CLK_GATE_PCIEAUX>,
74 <&crg_ctrl HI3670_PCLK_GATE_PCIE_PHY>,
75 <&crg_ctrl HI3670_PCLK_GATE_PCIE_SYS>,
76 <&crg_ctrl HI3670_ACLK_GATE_PCIE>;
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| D | hisilicon,hi3660-usb3.yaml | 48 hisilicon,pericrg-syscon = <&crg_ctrl>;
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| D | hisilicon,hi3670-usb3.yaml | 59 hisilicon,pericrg-syscon = <&crg_ctrl>;
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| /Documentation/devicetree/bindings/clock/ |
| D | hi3670-clock.txt | 30 crg_ctrl: clock-controller@fff35000 {
40 clocks = <&crg_ctrl HI3670_CLK_GATE_UART0>,
41 <&crg_ctrl HI3670_PCLK>;
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| D | hi3660-clock.txt | 34 crg_ctrl: clock-controller@fff35000 {
44 clocks = <&crg_ctrl HI3660_CLK_MUX_UART0>,
45 <&crg_ctrl HI3660_PCLK>;
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| /Documentation/devicetree/bindings/pwm/ |
| D | pwm-hibvt.txt | 20 clocks = <&crg_ctrl HI3516CV300_PWM_CLK>;
21 resets = <&crg_ctrl 0x38 0>;
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| /Documentation/devicetree/bindings/pci/ |
| D | hisilicon,kirin-pcie.yaml | 99 clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,
100 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,
101 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,
102 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,
103 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;
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| /Documentation/devicetree/bindings/ufs/ |
| D | hisilicon,ufs.yaml | 81 clocks = <&crg_ctrl HI3670_CLK_GATE_UFSIO_REF>,
82 <&crg_ctrl HI3670_CLK_GATE_UFS_SUBSYS>;
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| /Documentation/devicetree/bindings/soc/hisilicon/ |
| D | hisilicon,hi3660-usb3-otg-bc.yaml | 42 hisilicon,pericrg-syscon = <&crg_ctrl>;
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