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/Documentation/devicetree/bindings/clock/
Dmvebu-gated-clock.txt49 28 crypto0_enc Cryptographic Unit Port 0 Encryption
50 29 crypto0_core Cryptographic Unit Port 0 Core
51 30 crypto1_enc Cryptographic Unit Port 1 Encryption
52 31 crypto1_core Cryptographic Unit Port 1 Core
69 14 crypto0z Cryptographic 0 Z
71 16 crypto1z Cryptographic 1 Z
74 21 crypto1 Cryptographic 1
76 23 crypto0 Cryptographic 0
/Documentation/admin-guide/device-mapper/
Dverity.rst6 block devices using a cryptographic digest provided by the kernel crypto API.
59 The cryptographic hash algorithm used for this device. This should
63 The hexadecimal encoding of the cryptographic hash of the root hash block
163 has been authenticated in some way (cryptographic signatures, etc).
169 Cryptographic hashes are used to assert the integrity of the device on a
175 corrupted data will be verified using the cryptographic hash of the
182 Each node in the tree is a cryptographic hash. If it is a leaf node, the hash
188 selected cryptographic digest algorithm. The hashes are linearly-ordered in
/Documentation/crypto/
Dintro.rst7 The kernel crypto API offers a rich set of cryptographic ciphers as well
20 cryptographic operations, the kernel crypto API also knows compression
25 - consumers requesting cryptographic services
Dindex.rst10 for cryptographic use cases, as well as programming examples.
/Documentation/devicetree/bindings/crypto/
Dintel,ixp4xx-crypto.yaml8 title: Intel IXP4xx cryptographic engine
14 The Intel IXP4xx cryptographic engine makes use of the IXP4xx NPE
Damd-ccp.txt1 * AMD Cryptographic Coprocessor driver (ccp)
Dmediatek-crypto.txt1 MediaTek cryptographic accelerators
Dbrcm,spu-crypto.txt2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
Dxlnx,zynqmp-aes.yaml14 The ZynqMP AES-GCM hardened cryptographic accelerator is used to
Dcortina,sl3516-crypto.yaml7 title: SL3516 cryptographic offloader driver
Darm,cryptocell.yaml7 title: Arm TrustZone CryptoCell cryptographic engine
Dmv_cesa.txt1 Marvell Cryptographic Engines And Security Accelerator
Damlogic,gxl-crypto.yaml7 title: Amlogic GXL Cryptographic Offloader
Dfsl-imx-sahara.yaml7 title: Freescale SAHARA Cryptographic Accelerator
Dmarvell-cesa.txt1 Marvell Cryptographic Engines And Security Accelerator
Datmel,at91sam9g46-sha.yaml8 title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator
Datmel,at91sam9g46-aes.yaml8 title: Atmel Advanced Encryption Standard (AES) HW cryptographic accelerator
Datmel,at91sam9g46-tdes.yaml8 title: Atmel Triple Data Encryption Standard (TDES) HW cryptographic accelerator
Dstarfive,jh7110-crypto.yaml7 title: StarFive Cryptographic Module
Dfsl-sec6.txt1 SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
76 cryptographic descriptors. The specified address
Dinside-secure,safexcel.yaml7 title: Inside Secure SafeXcel cryptographic engine
/Documentation/networking/
Dtls-offload.rst12 Layer Protocol (ULP) and install the cryptographic connection state.
79 When TLS cryptographic connection state is installed on a ``ktls`` socket
96 ``direction`` indicates whether the cryptographic information is for
99 Cryptographic information in ``crypto_info`` includes the key, iv, salt
200 if the table was full when cryptographic state was installed in the kernel,
202 does not carry any cryptographic connection state.
216 the device with enough information to perform cryptographic operations.
402 * total cryptographic performance
413 Total cryptographic performance
418 Overload of the cryptographic subsystem of the device should not have
/Documentation/arch/arm/stm32/
Dstm32f429-overview.rst16 - Cryptographic processor
/Documentation/devicetree/bindings/arm/
Darm,corstone1000.yaml25 seamless integration of the optional CryptoCell™-312 cryptographic
/Documentation/virt/kvm/s390/
Ds390-pv-dump.rst33 This step initializes the dump process, generates cryptographic seeds

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