| /Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 17 - qcom,apq8064-dsi-ctrl
18 - qcom,msm8226-dsi-ctrl
19 - qcom,msm8916-dsi-ctrl
20 - qcom,msm8953-dsi-ctrl
21 - qcom,msm8974-dsi-ctrl
22 - qcom,msm8976-dsi-ctrl
23 - qcom,msm8996-dsi-ctrl
24 - qcom,msm8998-dsi-ctrl
25 - qcom,qcm2290-dsi-ctrl
26 - qcom,sc7180-dsi-ctrl
[all …]
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| /Documentation/devicetree/bindings/mux/ |
| D | mux-consumer.yaml | 14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
19 mux-ctrl-specifier : array of #mux-control-cells specifying the
39 mux-ctrl-specifier typically encodes the chip-relative mux controller number.
41 mux-ctrl-specifier can typically be left out.
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| /Documentation/devicetree/bindings/net/ |
| D | davinci_emac.txt | 10 - ti,davinci-ctrl-reg-offset: offset to control register
11 - ti,davinci-ctrl-mod-reg-offset: offset to control module register
12 - ti,davinci-ctrl-ram-offset: offset to control module ram
13 - ti,davinci-ctrl-ram-size: size of control module ram
33 ti,davinci-ctrl-reg-offset = <0x3000>;
34 ti,davinci-ctrl-mod-reg-offset = <0x2000>;
35 ti,davinci-ctrl-ram-offset = <0>;
36 ti,davinci-ctrl-ram-size = <0x2000>;
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| /Documentation/devicetree/bindings/reset/ |
| D | renesas,rzg2l-usbphy-ctrl.yaml | 4 $id: http://devicetree.org/schemas/reset/renesas,rzg2l-usbphy-ctrl.yaml#
20 - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five
21 - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC}
22 - renesas,r9a07g054-usbphy-ctrl # RZ/V2L
23 - const: renesas,rzg2l-usbphy-ctrl
66 phyrst: usbphy-ctrl@11c40000 {
67 compatible = "renesas,r9a07g044-usbphy-ctrl",
68 "renesas,rzg2l-usbphy-ctrl";
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| /Documentation/devicetree/bindings/sound/ |
| D | cirrus,cs35l45.yaml | 46 cirrus,asp-sdout-hiz-ctrl:
57 "^cirrus,gpio-ctrl[1-3]$":
65 GPIO pin direction. Valid only when 'gpio-ctrl' is 1
74 GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
83 GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0
92 GPIO output polarity select. Valid only when 'gpio-ctrl' is 1
100 gpio-ctrl:
146 cirrus,asp-sdout-hiz-ctrl = <(CS35L45_ASP_TX_HIZ_UNUSED |
149 gpio-ctrl = <0x2>;
152 gpio-ctrl = <0x2>;
[all …]
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| D | alc5623.txt | 10 - add-ctrl: Default register value for Reg-40h, Additional Control
14 - jack-det-ctrl: Default register value for Reg-5Ah, Jack Detect
23 add-ctrl = <0x3700>;
24 jack-det-ctrl = <0x4810>;
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| /Documentation/devicetree/bindings/soc/imx/ |
| D | fsl,imx8mq-vpu-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mq-vpu-blk-ctrl.yaml#
7 title: NXP i.MX8MQ VPU blk-ctrl
13 The i.MX8MQ VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mq-vpu-blk-ctrl
62 blk-ctrl@38320000 {
63 compatible = "fsl,imx8mq-vpu-blk-ctrl";
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| D | fsl,imx8mm-vpu-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-vpu-blk-ctrl.yaml#
7 title: NXP i.MX8MM VPU blk-ctrl
13 The i.MX8MM VPU blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-vpu-blk-ctrl
60 const: fsl,imx8mm-vpu-blk-ctrl
105 const: fsl,imx8mp-vpu-blk-ctrl
153 blk-ctrl@38330000 {
154 compatible = "fsl,imx8mm-vpu-blk-ctrl", "syscon";
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| D | fsl,imx8mp-hsio-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml#
7 title: NXP i.MX8MP HSIO blk-ctrl
13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hsio-blk-ctrl
79 blk-ctrl@32f10000 {
80 compatible = "fsl,imx8mp-hsio-blk-ctrl", "syscon";
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| D | fsl,imx8mp-hdmi-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hdmi-blk-ctrl.yaml#
7 title: NXP i.MX8MP HDMI blk-ctrl
13 The i.MX8MP HDMMI blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mp-hdmi-blk-ctrl
82 blk-ctrl@32fc0000 {
83 compatible = "fsl,imx8mp-hdmi-blk-ctrl", "syscon";
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| D | fsl,imx8mm-disp-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mm-disp-blk-ctrl.yaml#
7 title: NXP i.MX8MM DISP blk-ctrl
13 The i.MX8MM DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mm-disp-blk-ctrl
73 blk-ctrl@32e28000 {
74 compatible = "fsl,imx8mm-disp-blk-ctrl", "syscon";
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| D | fsl,imx8mn-disp-blk-ctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mn-disp-blk-ctrl.yaml#
7 title: NXP i.MX8MN DISP blk-ctrl
13 The i.MX8MN DISP blk-ctrl is a top-level peripheral providing access to
20 - const: fsl,imx8mn-disp-blk-ctrl
74 blk-ctrl@32e28000 {
75 compatible = "fsl,imx8mn-disp-blk-ctrl", "syscon";
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| /Documentation/devicetree/bindings/usb/ |
| D | amlogic,meson-g12a-usb-ctrl.yaml | 5 $id: http://devicetree.org/schemas/usb/amlogic,meson-g12a-usb-ctrl.yaml#
33 - amlogic,meson-gxl-usb-ctrl
34 - amlogic,meson-gxm-usb-ctrl
35 - amlogic,meson-axg-usb-ctrl
36 - amlogic,meson-g12a-usb-ctrl
37 - amlogic,meson-a1-usb-ctrl
106 - amlogic,meson-g12a-usb-ctrl
120 - amlogic,meson-gxl-usb-ctrl
140 - amlogic,meson-gxm-usb-ctrl
162 - amlogic,meson-axg-usb-ctrl
[all …]
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| /Documentation/devicetree/bindings/leds/ |
| D | kinetic,ktd2692.yaml | 16 The ExpressWire interface through CTRL pin can control LED on/off and
20 Also, When the AUX pin is pulled high while CTRL pin is high,
27 ctrl-gpios:
29 description: Specifier of the GPIO connected to CTRL pin.
33 description: Specifier of the GPIO connected to CTRL pin.
62 - ctrl-gpios
74 ctrl-gpios = <&gpc0 1 0>;
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| /Documentation/netlink/specs/ |
| D | nlctrl.yaml | 48 name: ctrl-attrs
49 name-prefix: ctrl-attr-
91 name-prefix: ctrl-attr-mcast-grp-
102 name-prefix: ctrl-attr-op-
157 name-prefix: ctrl-attr-policy-
169 name-prefix: ctrl-cmd-
174 attribute-set: ctrl-attrs
195 attribute-set: ctrl-attrs
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| /Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,brcmstb.txt | 19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
25 cpu-biu-ctrl node
36 - compatible: must be "brcm,bcm7445-cpu-biu-ctrl", "brcm,brcmstb-cpu-biu-ctrl", "syscon"
52 compatible = "brcm,bcm7445-sun-top-ctrl", "syscon";
57 compatible = "brcm,bcm7445-cpu-biu-ctrl", "brcm,brcmstb-cpu-biu-ctrl", "syscon";
128 = Always-On control block (AON CTRL)
134 - compatible : should contain "brcm,brcmstb-aon-ctrl"
135 - reg : the register start and length for the AON CTRL block
[all …]
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| /Documentation/devicetree/bindings/phy/ |
| D | brcm,ns2-drd-phy.txt | 9 rst-ctrl - for DRD IDM reset
10 crmu-ctrl - for CRMU core vdd, PHY and PHY PLL reset
26 reg-names = "icfg", "rst-ctrl",
27 "crmu-ctrl", "usb2-strap";
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| /Documentation/devicetree/bindings/iio/amplifiers/ |
| D | adi,hmc425a.yaml | 37 ctrl-gpios:
56 ctrl-gpios:
68 ctrl-gpios:
78 ctrl-gpios:
84 - ctrl-gpios
93 ctrl-gpios = <&gpio 40 GPIO_ACTIVE_HIGH>,
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| /Documentation/devicetree/bindings/scsi/ |
| D | hisilicon-sas.txt | 16 - ctrl-reset-reg : offset to controller reset register in ctrl reg
17 - ctrl-reset-sts-reg : offset to controller reset status register in ctrl reg
18 - ctrl-clock-ena-reg : offset to controller clock enable register in ctrl reg
70 ctrl-reset-reg = <0xa60>;
71 ctrl-reset-sts-reg = <0x5a30>;
72 ctrl-clock-ena-reg = <0x338>;
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| /Documentation/devicetree/bindings/firmware/ |
| D | nxp,imx95-scmi.yaml | 30 nxp,ctrl-ids:
32 Each entry consists of 2 integers, represents the ctrl id and the value
35 - description: the ctrl id index
38 - description: the value assigned to the ctrl id
|
| /Documentation/devicetree/bindings/mips/brcm/ |
| D | soc.txt | 21 = Always-On control block (AON CTRL)
28 "brcm,bcm7425-aon-ctrl"
29 "brcm,bcm7429-aon-ctrl"
30 "brcm,bcm7435-aon-ctrl" and
31 "brcm,brcmstb-aon-ctrl"
32 - reg : the register start and length for the AON CTRL block
37 compatible = "brcm,bcm7425-aon-ctrl", "brcm,brcmstb-aon-ctrl";
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| /Documentation/devicetree/bindings/arm/marvell/ |
| D | armada-380-mpcore-soc-ctrl.txt | 6 - compatible: Should be "marvell,armada-380-mpcore-soc-ctrl".
11 mpcore-soc-ctrl@20d20 {
12 compatible = "marvell,armada-380-mpcore-soc-ctrl";
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| /Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,admfm2000.yaml | 54 GPIOs to select the RF path for the channel. The same state of CTRL-A
55 and CTRL-B GPIOs is not permitted.
56 CTRL-A CTRL-B CH1 Status CH2 Status
61 - description: CTRL-A GPIO
62 - description: CTRL-B GPIO
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| /Documentation/devicetree/bindings/mfd/ |
| D | mxs-lradc.txt | 14 - fsl,ave-ctrl: number of samples per direction to calculate an average value.
17 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
30 fsl,ave-ctrl = <4>;
42 fsl,ave-ctrl = <4>;
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| /Documentation/devicetree/bindings/memory-controllers/ |
| D | calxeda-ddr-ctrlr.yaml | 20 - calxeda,hb-ddr-ctrl
21 - calxeda,ecx-2000-ddr-ctrl
39 compatible = "calxeda,hb-ddr-ctrl";
|