Searched +full:data +full:- +full:lanes (Results 1 – 25 of 133) sorted by relevance
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| /Documentation/devicetree/bindings/media/ |
| D | qcom,sm8250-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Robert Foss <robert.foss@linaro.org> 18 const: qcom,sm8250-camss 24 clock-names: 26 - const: cam_ahb_clk 27 - const: cam_hf_axi 28 - const: cam_sf_axi [all …]
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| D | brcm,bcm2835-unicam.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/brcm,bcm2835-unicam.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com> 12 description: |- 14 CSI-2 or CCP2 data from image sensors or similar devices. 26 const: brcm,bcm2835-unicam 30 - description: Unicam block. 31 - description: Clock Manager Image (CMI) block. [all …]
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| D | qcom,sc8280xp-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/qcom,sc8280xp-camss.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 17 const: qcom,sc8280xp-camss 22 clock-names: 24 - const: camnoc_axi 25 - const: cpas_ahb 26 - const: csiphy0 [all …]
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| D | ti,cal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Benoit Parrot <bparrot@ti.com> 12 description: |- 15 processing capability to connect CSI2 image-sensor modules to the 24 - ti,dra72-cal 26 - ti,dra72-pre-es2-cal 28 - ti,dra76-cal 30 - ti,am654-cal [all …]
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| D | video-interfaces.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sakari Ailus <sakari.ailus@linux.intel.com> 11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com> 14 Video data pipelines usually consist of external devices, e.g. camera sensors, 16 video DMA engines and video data processors. 22 Data interfaces on all video devices are described by their child 'port' nodes. 23 Configuration of a port depends on other devices participating in the data [all …]
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| D | qcom,msm8996-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Robert Foss <robert.foss@linaro.org> 12 - Todor Tomov <todor.too@gmail.com> 19 const: qcom,msm8996-camss 25 clock-names: 27 - const: top_ahb 28 - const: ispif_ahb [all …]
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| D | qcom,sdm660-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/qcom,sdm660-camss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Robert Foss <robert.foss@linaro.org> 12 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org> 19 const: qcom,sdm660-camss 25 clock-names: 27 - const: ahb 28 - const: cphy_csid0 [all …]
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| D | qcom,sdm845-camss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/qcom,sdm845-camss.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Robert Foss <robert.foss@linaro.org> 18 const: qcom,sdm845-camss 24 clock-names: 26 - const: camnoc_axi 27 - const: cpas_ahb 28 - const: cphy_rx_src [all …]
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| /Documentation/devicetree/bindings/media/xilinx/ |
| D | xlnx,csi2rxss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Xilinx MIPI CSI-2 Receiver Subsystem 10 - Vishal Sagar <vishal.sagar@amd.com> 13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2 15 video data for image processing. 16 The subsystem consists of a MIPI D-PHY in slave mode which captures the 17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the 18 packet data. The optional Video Format Bridge (VFB) converts this data to [all …]
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| /Documentation/devicetree/bindings/media/i2c/ |
| D | adv748x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Kieran Bingham <kieran.bingham@ideasonboard.com> 11 - Niklas Söderlund <niklas.soderlund@ragnatech.se> 15 HDMI receiver. They can output CSI-2 on two independent outputs TXA and TXB 21 - enum: 22 - adi,adv7481 23 - adi,adv7482 29 The ADV748x has up to twelve 256-byte maps that can be accessed via the [all …]
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| D | ovti,ov7251.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 The Omnivision OV7251 is a 1/7.5-Inch CMOS active pixel digital image sensor 15 - Todor Tomov <todor.too@gmail.com> 27 clock-names: 30 clock-frequency: 33 vdda-supply: 36 vddd-supply: 39 vdddo-supply: [all …]
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| D | ovti,ov8858.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jacopo Mondi <jacopo.mondi@ideasonboard.com> 11 - Nicholas Roth <nicholas@rothemail.net> 15 controlled through an I2C-compatible SCCB bus. The sensor transmits images 16 on a MIPI CSI-2 output interface with up to 4 data lanes. 29 clock-names: 32 dvdd-supply: 35 avdd-supply: [all …]
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| D | st,st-vgxy61.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/media/i2c/st,st-vgxy61.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Benjamin Mugnier <benjamin.mugnier@foss.st.com> 12 - Sylvain Petinot <sylvain.petinot@foss.st.com> 14 description: |- 15 STMicroelectronics VGxy61 family has a CSI-2 output port. CSI-2 output is a 16 quad lanes 800Mbps per lane. 19 - VG5661 and VG6661 are 1.6 Mpx (1464 x 1104) monochrome and color sensors. [all …]
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| D | ovti,og01a1b.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (c) 2023-2024 Linaro Ltd. 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> 15 image sensor controlled over an I2C-compatible SCCB bus. 16 The sensor transmits images on a MIPI CSI-2 output interface with one or 17 two data lanes. 20 - $ref: /schemas/media/video-interface-devices.yaml# 32 reset-gpios: [all …]
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| D | isil,isl79987.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Intersil ISL79987 Analog to MIPI CSI-2 decoder 10 - Michael Tretter <m.tretter@pengutronix.de> 11 - Marek Vasut <marex@denx.de> 14 The Intersil ISL79987 is an analog to MIPI CSI-2 decoder which is capable of 16 CSI-2 virtual channels, using one MIPI clock lane and 1/2 data lanes. 21 - isil,isl79987 26 reset-gpios: [all …]
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| D | tc358743.txt | 1 * Toshiba TC358743 HDMI-RX to MIPI CSI2-TX Bridge 3 The Toshiba TC358743 HDMI-RX to MIPI CSI2-TX (H2C) is a bridge that converts 4 a HDMI stream to MIPI CSI-2 TX. It is programmable through I2C. 8 - compatible: value should be "toshiba,tc358743" 9 - clocks, clock-names: should contain a phandle link to the reference clock 14 - reset-gpios: gpio phandle GPIO connected to the reset pin 15 - interrupts: GPIO connected to the interrupt pin 16 - data-lanes: should be <1 2 3 4> for four-lane operation, 17 or <1 2> for two-lane operation 18 - clock-lanes: should be <0> [all …]
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| D | thine,thp7312.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul Elder <paul.elder@@ideasonboard.com> 17 MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2 19 interleaved data streams with data types or multiple virtual channel 23 - $ref: /schemas/media/video-interface-devices.yaml# 36 thine,boot-mode: 43 0 is for the SPI/2-wire slave boot, 1 is for the SPI master boot (from 46 reset-gpios: [all …]
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| D | sony,imx214.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Sony 1/3.06-Inch 13.13MP CMOS Digital Image Sensor 10 - Ricardo Ribalda <ribalda@kernel.org> 13 The Sony IMX214 is a 1/3.06-inch CMOS active pixel digital image sensor with 15 interface. Image data is sent through MIPI CSI-2, through 2 or 4 lanes at a 19 - $ref: /schemas/media/video-interface-devices.yaml# 27 - 0x10 28 - 0x1a [all …]
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| D | sony,imx415.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Riesch <michael.riesch@wolfvision.net> 12 description: |- 14 solid-state image sensor with a square pixel array and 8.46 M effective 18 available via CSI-2 serial data output (two or four lanes). 21 - $ref: /schemas/media/video-interface-devices.yaml# 34 avdd-supply: 37 dvdd-supply: [all …]
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| D | st,st-mipid02.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/media/i2c/st,st-mipid02.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge 10 - Benjamin Mugnier <benjamin.mugnier@foss.st.com> 11 - Sylvain Petinot <sylvain.petinot@foss.st.com> 14 MIPID02 has two CSI-2 input ports, only one of those ports can be 15 active at a time. Active port input stream will be de-serialized 17 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 [all …]
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| D | alliedvision,alvium-csi2.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/media/i2c/alliedvision,alvium-csi2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tommaso Merciai <tomm.merciai@gmail.com> 11 - Martin Hecht <martin.hecht@avnet.eu> 14 - $ref: /schemas/media/video-interface-devices.yaml# 18 const: alliedvision,alvium-csi2 23 vcc-ext-in-supply: 29 $ref: /schemas/graph.yaml#/$defs/port-base [all …]
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| D | sony,imx334.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Paul J. Murphy <paul.j.murphy@intel.com> 12 - Daniele Alessandrelli <daniele.alessandrelli@intel.com> 17 I2C client address is fixed to 0x1a as per sensor data sheet. Image data is 18 sent through MIPI CSI-2. 27 assigned-clocks: true 28 assigned-clock-parents: true 29 assigned-clock-rates: true [all …]
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| /Documentation/driver-api/media/drivers/ |
| D | ipu6.rst | 1 .. SPDX-License-Identifier: GPL-2.0 34 ------------------------ 51 --------- 61 ------------------------------------- 76 ----------------- 80 Buttress with a copy of the SoC time, this counter maintains the up-to-date time 90 32-bit virtual address space. The IPU6 has MMU address translation hardware to 94 IPU6 driver. The IPU6 driver sets the level-1 page table base address to MMU 101 .. code-block:: none 113 generic PCI DMA ops to ask IOMMU to do the additional mapping if VT-d [all …]
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| /Documentation/devicetree/bindings/display/mediatek/ |
| D | mediatek,dp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Chun-Kuang Hu <chunkuang.hu@kernel.org> 11 - Jitao shi <jitao.shi@mediatek.com> 24 - mediatek,mt8188-dp-tx 25 - mediatek,mt8188-edp-tx 26 - mediatek,mt8195-dp-tx 27 - mediatek,mt8195-edp-tx 32 nvmem-cells: [all …]
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| /Documentation/devicetree/bindings/display/bridge/ |
| D | renesas,dsi-csi2-tx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dsi-csi2-tx.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Renesas R-Car MIPI DSI/CSI-2 Encoder 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 13 This binding describes the MIPI DSI/CSI-2 encoder embedded in the Renesas 14 R-Car Gen4 SoCs. The encoder can operate in either DSI or CSI-2 mode, with up 15 to four data lanes. 20 - renesas,r8a779a0-dsi-csi2-tx # for V3U [all …]
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